Uzma Wajeeh Shaikh

Uzma Wajeeh Shaikh

Low power design @ Qualcomm

About

Electrical engineer with interest in improving the performance of SoCs by optimizing power consumption and improving chip architecture. Help develop novel hardware and high-performance chip architecture for ML applications. Currently, as a Multimedia Power Engineer at Qualcomm, I am performing power analysis and optimization for Snapdragon SoC chipsets I love to paint and sketch in my free time.

Country

United States

City

Stanford

Industry

Computer Hardware

Skill

Power Estimation, Low-power Design, Low power design analysis, GPU performance , Soc Analysis , Computer Architecture, Power Analysis, Sensors, Programmable Logic Controller (PLC), Distributed Control System (DCS), Computer Archietcure, Systems Design, C++, C, MATLAB, Microcontrollers, Algorithms, Field-Programmable Gate Arrays (FPGA), Application-Specific Integrated Circuits (ASIC), Research

Experience

Qualcomm

Low power design

Qualcomm

LinkedIn
2026-1 - Present · 9 mos

United States

Qualcomm

Multimedia power architect

Qualcomm

LinkedIn
2023-7 - 2025-12 · 2 yrs 6 mos

United States

Camera Power architect working to optimize power and improve performance with respect to area of SoC for multimedia technologies, performing rtl power analysis and optimization for Snapdragon SoC chipsets

NVIDIA

Tegra System Architecture Intern

NVIDIA

LinkedIn
2022-6 - 2022-9 · 4 mos

United States

Performance (Power Analysis and modeling) for NVIDIA's Tegra family of System-on-Chip hardware. 1) Optimizing power and performance. 2) evaluate architectural tradeoffs in DL/ML (training/inference), CPU, GPU workloads.

Physical Research Laboratory

Research Intern

Physical Research Laboratory

LinkedIn
2019-1 - 2019-5 · 5 mos

Ahmedabad, Gujarat, India

Mentor : Dr. Jayesh Pabari Collaborated to develop an algorithm for the Inter Planetary Dust Particle Detector with the aim of measuring maximum altitude that Dust Devil can achieve on different planets. Implemented the algorithm using verilog to design digital components on ProAsic 3E FPGA. Worked on the architecture of entire Dust detector module

Siemens

Project Trainee

Siemens

LinkedIn
2018-5 - 2018-7 · 3 mos

Vadodara, Gujarat, India

Mentor: Anjali Dharampuria Contributed to develop low cost embedded solution to automate monitoring and operation of Steam Turbine system. Identified and deployed sensors, based on their cost, sensitivity and calibration. Programmed PLC’s for development of automatic Distributed Control System. Studied the overall architecture and circuits used to generate electricity from entire stream turbine system.

Education

Stanford University

Stanford University

LinkedIn

Electrical Engineering

2021-9 - 2023-6 · 1 yr 10 mos
CHARUSAT

CHARUSAT

LinkedIn

Electronics and Communication Engineering

Gold medalist Department Rank: 1 University Rank: 2

Uzma Wajeeh Shaikh's Contact Information

Email

******@***.com

Phone

(**) *** ****

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