Spoorthi G Gojanur
CPU Power Architect @ NVIDIA
United States
Santa Clara
Electrical & Electronic Manufacturing
Silicon Power Bring-up, Silicon Power Validation & Correlation , Workload Performance/Power Characterization, Power Estimation, PTPX, DAQ, Power Artist, Computer Architecture, Low-power Design, System on a Chip (SoC), Synopsys Verdi, UPF, Cadence CLP, Clock Tree Power , Synopsys Design Compiler, Logic Synthesis, RTL, Verilog, Cadence Virtuoso, Microsoft Excel
Experience
CPU Power Architect
NVIDIA
Santa Clara, California, United States
Graduate Teaching Assistant
UC San Diego Jacobs School of Engineering
San Diego, California, United States
SoC Power Modelling & Analysis
Qualcomm
San Diego, California, United States
Associate Engineer - SoC Low Power Design
Qualcomm
Bengaluru, Karnataka, India
SoC Low Power Design
Qualcomm
Noida, Uttar Pradesh, India
Project Intern
Indian Institute of Science (IISc)
Bengaluru, Karnataka, India
Intern
Narayana Health
Bengaluru, Karnataka, India
Intern
Oracle
Bengaluru, Karnataka, India
Education
UC San Diego
Computer Engineering
RV College Of Engineering
Electronic and Communications Engineering
AECS Magnolia Maaruti Public School - India
Spoorthi G Gojanur's Contact Information
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