Pavan Kumar Govardhanam

Graduated in Electrical and Computer Engineering from Portland State University(December 2024). Major focus is on Design and Verification. I have done my bachelors in Electronics and Communication Engineering from Padmasri B V Raju Institute of Technology(BVRIT), Narsapur. Actively looking for Entry-level Full time roles in ASIC/SOC/CPU Design and Verification starting immediately. Skills: > HDL: Verilog, System Verilog, UVM. > Programming Languages: C, C++, Python, Embedded C, Java. > Scripting: Python, Perl. > Protocols: SPI, I2C, AMBA AXI. Concepts: > Design and Verification: Digital Logic Design, RTL Design, Functional Verification, Formal Verification, Coverage-Driven Verification, Assertion-Based Verification, SystemVerilog and UVM Verification Environment, Clock-Domain Crossing, Static Timing Analysis. > Computer Architecture: Cache Coherence, Block Replacement Techniques, MESI Protocol, Pipelining, Branch Prediction, Register Renaming, Data Forwarding. Contact me at Mobile: +1 971-428-4497 email: pavan4@pdx.edu Regards, Pavan.