Jing Liu
Logic Design Engineer @ Marvell Technology
About
Self-motivated individual looking for ASIC design/Architecture positions. Reach me via jingliu324@gmail.com
United States
Sunnyvale
Computer Hardware
Microsoft Office, Verilog, C, ASIC, VHDL, ModelSim, FPGA, Research, RTL design, Computer Architecture, HTML, Teamwork, Functional Verification, C++, RTL Design, VLSI, Matlab, Perl
Experience
Logic Design Engineer
Marvell Technology
Web Developer
UEE Foudation
Greater Los Angeles Area
Design a web site in the environment of Word Express, use HTML, JavaScript. Link: fundingdream.com
Education
University of Southern California
Electrical and Electronics Engineering_VLSI
VLSI, ASIC flow-RTL design, synthesis, Static timing analysis, LEC, physical design. Computer Architecture, CMP network, Tomasulo CPU, NUCA cache.
Jing Liu's Contact Information
Phone
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