Hiranmai Batte

Hiranmai Batte

Verification Engineer @ Intel Corporation

About

-Graphics hardware Verification Engineer at Intel. -Masters in Electrical Engineering from San Jose State University.

Country

United States

City

San Jose

Industry

Computer Software

Skill

Regression Testing, Graphic Design, Graphical User Interface (GUI), Optical Fiber, Network Security, Networking, Virtual Private Network (VPN), Wide Area Network (WAN), FPGA prototyping, Floating Production, Storage and Offloading (FPSO), Logic Gates, EDA, MATLAB, Mathworks, GNU Octave, Octave, MIPS Instruction Set, Microprocessors, Functional coverage, Constraints

Experience

Intel Corporation

Verification Engineer

Intel Corporation

LinkedIn
2024-4 - Present · 2 yrs 6 mos

Santa Clara, California, United States

San José State University

Research Assistant

San José State University

LinkedIn
2024-1 - 2024-4 · 4 mos

California, United States

San José State University

Teaching Assistant

San José State University

LinkedIn
2023-8 - 2023-12 · 5 mos

United States

San José State University

Instructional Student Assistant

San José State University

LinkedIn
2022-9 - 2023-12 · 1 yr 4 mos

San Jose, California, United States

Intel Corporation

Graphics Hardware Verification Intern

Intel Corporation

LinkedIn
2023-6 - 2023-8 · 3 mos

Santa Clara, California, United States

Responsible for writing constraints, coverage, triaging weekly runs, and debugs. Automated validation checks using Python for all the units contained in the media Engine

Nano Scientific Research Centre

VLSI Systems Engineer intern

Nano Scientific Research Centre

LinkedIn
2020-5 - 2021-4 · 1 yr

Hyderabad, India

Bharat Sanchar Nigma Limited

Student Intern

Bharat Sanchar Nigma Limited

2017-5 - 2017-6 · 2 mos

India

Vocational trainee in telecom

Education

San José State University

San José State University

LinkedIn

Electrical Engineering

2022-1 - 2023-12 · 2 yrs

Relevant courses: Probability,Random Variables and Stochastic Processes (EE 250) Advanced Digital System Design and Synthesis (EE 271) Advanced Computer Architecture (EE 275) CMOS SoC design, and verification with System Verilog (EE 272). Internetworking (EE 281). Digital Design for AI and DSP (EE 278). Computer Vision with Artificial Intelligence Applications (EE 267). Network Security (EE 209).

Jawaharlal Nehru Technological University, Kakinada

Jawaharlal Nehru Technological University, Kakinada

LinkedIn

Electronics and Communications Engineering

2014-6 - 2018-5 · 4 yrs

Relevant Courses: Digital Logic Design, Embedded Systems design, VLSI digital design systems, Circuit Designs, Digital Signal Processing.

Kendriya Vidyalaya

Kendriya Vidyalaya

LinkedIn
2003 - 2012 · 9 yrs

Hiranmai Batte's Contact Information

Email

******@***.com

Phone

(**) *** ****

Find the Right Leads
Find Verified Contact Data

Try with: Jensen Huang @ nvidia.com Click to autofill
LeadContact awards, five-star ratings, and GDPR compliance badges

What LeadContact does well

Find verified emails, phone numbers, and decision-makers with 98% accuracy.

Find Leads

Find Leads

Find the right people by company, role, industry, location, and more.

925M+ professional profiles

Find Leads
Find Emails

Find Emails

Access verified email addresses for your target contacts.

657M+ emails

Find Emails
Find Phone Numbers

Find Phone Numbers

Get cross-validated phone data from multiple top sources.

239M+ phone numbers

Find Phone Numbers

More Accurate. Lower Cost.

Find contact data in 1 tool with 98% accuracy

LeadContact integrates leading enrichment tools to deliver more accurate contact data—without paying for each one.

LeadContact Logo
Competitor Tools

All these = $289 per month

Great conversations start with the right contact.

It’s time to find yours.