Bharath Suresh

Bharath Suresh

Senior Engineer, GPU Microarchitecture @ Qualcomm

About

I love computers, the chips that power them, and the people that make all of this happen. I am open to conversations with anyone that wants to talk about computers or a career in this field. My apologies in advance if I don't reply to your messages. However, the best way to reach me is to schedule a call at: https://calendly.com/bharathw/30min (I don't charge money for calls; this link is just to simplify scheduling)

Country

United States

City

San Diego

Industry

Computer Hardware

Skill

RTL Design, Field-Programmable Gate Arrays (FPGA), Computer Architecture, Semiconductor Device, Machine Learning, Application-Specific Integrated Circuits (ASIC), Neuromorphic Computing, Computer-Aided Design (CAD), Verilog, Scripting, Teaching, Leadership, Python (Programming Language)

Experience

Qualcomm

Senior Engineer, GPU Microarchitecture

Qualcomm

LinkedIn
2024-11 - Present · 1 yr 11 mos

San Diego, California, United States

-> RTL Design and Microarchitecture for Adreno GPUs

Qualcomm

Engineer, GPU Microarchitecture

Qualcomm

LinkedIn
2023-4 - 2024-10 · 1 yr 7 mos

San Diego, California, United States

Google

Intern

Google

LinkedIn
2022-6 - 2022-9 · 4 mos

Sunnyvale, California, United States

-> Worked on FPGA prototyping for one of Google Cloud's accelerator chips -> Designed RTL for an interconnect block to allow communication between FPGAs

Nano Intelligent Systems Lab

Graduate Student Researcher

Nano Intelligent Systems Lab

2021-9 - 2022-6 · 10 mos

Los Angeles, California, United States

-> Worked on the ASIC design flow (RTL to GDS) for Synstor and Neuristor Integrated Circuit (SNIC) -> Designed RTL and setup the FPGA flow for Synstor device testing

AMD

FPGA Design Engineer

AMD

LinkedIn
2020-8 - 2021-8 · 1 yr 1 mo

Hyderabad, Telangana, India

-> Data Center Group, Xilinx -> Designed RTL and developed TCL wrappers for efficient AXI Interconnect IPs -> Responsible for new features and bug fixes in SmartConnect IP (2020.2 to 2021.2 releases)

Intel Labs

Intern

Intel Labs

LinkedIn
2020-1 - 2020-7 · 7 mos

Bengaluru Area, India

-> Processor Architecture Research (PAR) Labs -> Designed Hardware Accelerators of Machine Learning workloads -> Worked on efficient Hardware-Software co-design

Birla Institute of Technology and Science, Pilani

Student Researcher

Birla Institute of Technology and Science, Pilani

LinkedIn
2018-8 - 2020-5 · 1 yr 10 mos

Hyderabad, Telangana, India

- Contributed to Resistive Switching based Neuromorphic Computing research under the supervision of Prof. Souvik Kundu - Published 3 research papers in top journals

Indian Institute of Science (IISc)

Research Assistant

Indian Institute of Science (IISc)

LinkedIn
2019-8 - 2019-12 · 5 mos

Bengaluru, India

-> NeuRonICS lab, Department of Electronic Systems Engineering (DESE) -> Advisor - Dr. Chetan Singh Thakur -> Implemented Approximate Neuromorphic Machine Learning Accelerators

CITEC, Bielefeld University, Germany

Research Intern

CITEC, Bielefeld University, Germany

2019-5 - 2019-7 · 3 mos

Bielefeld, Germany

-> Neuromorphic Behaving Systems Group -> Advisor - Prof. Elisabetta Chicca -> Developed Neuron circuits for low-power Neuromorphic Systems

Education

UCLA

UCLA

LinkedIn

Electrical and Computer Engineering

2021-9 - 2023-3 · 1 yr 7 mos

Focus - VLSI Design and Computer Architecture

Birla Institute of Technology and Science, Pilani

Birla Institute of Technology and Science, Pilani

LinkedIn

Electrical, Electronics and Communications Engineering

2016 - 2020 · 4 yrs

-> Rank 1 in the Electrical and Electronics Engineering (EEE) department -> Recipient of Merit Scholarship for all my completed semesters

Bharath Suresh's Contact Information

Email

******@***.com

Phone

(**) *** ****

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