Yuen Chun SOH

Senior Engineering Manager (Assembly Process & Equipment) @ ASE Global

About

Summary: Senior Engineering Manager in semiconductor package assembly industry. Specialized in Assembly Process & Technology; Project Management; New Package & Product Introduction; Package Level Quality & Reliability; Cu WB Technical Development & Deployment. Served as the Wire Bond Advocate for Analog Devices from 2020-2022. Core Competencies: - Project management in package transfer, process & technology introduction, productivity/cost saving projects. - Statistical knowledge (JMP/Minitab statistical software) on various statistics analysis methodology & DOE concept. Familiar with package level reliability modeling. - Assembly process & technology knowledge covering Leaded, QFN, PBGA, FCBGA, Discrete & uModule packages. - Technical Cu WB development & deployment covering Discrete, Leaded & QFN packages. Awards/Presentations: - Intel Malaysia Site Recognition - Infineon Backend Team of Quarter - Infineon Prior Art IP Publication - Technical Paper Presentation at CSTIC, EPTC & IEMT Conference

Country

Malaysia

City

Bayan Lepas

Industry

Semiconductors

Skill

Semiconductors, Reliability Engineering, SPC, Semiconductor Manufacturing, Reliability, Technology Development, Design of Experiments, Semiconductor Industry, IC, Failure Analysis, Manufacturing, Characterization, Silicon, Product Engineering, JMP, Process Engineering

Experience

Senior Engineering Manager (Assembly Process & Equipment)

ASE Global

2026-5 - Present · 5 mos

Bayan Lepas

ASE-PG (formerly known as Analog Devices Sdn Bhd)

Assembly Engineering (Process & Equipment) Senior Manager

Analog Devices

2014-2 - 2026-5 · 12 yrs 4 mos

Penang, Malaysia

Manage assembly process & equipment team that consist of >50 headcounts. Served as corporate Wire Bond Advocate from 2020-2022. FOL Assembly Engineering Feb'14 - Jun'19: - Lead FOL processes that cover Pre-Assrmbly (Spin Coat, Die Prep & 2nd Opt/AOI), DA, Plasma Clean, WB, Die Coat & 3rd Opt/AOI for leadframe packages. Jan'18 - Jun'19: - Expand responsibilites to lead uModule packages processes SMT/Reflow, Flux Clean & Components AOI. EOL Assembly Engineering Jul'19 - Present: - Lead EOL processes (Mold/PMC, Slurry/Laser Deflash, Ink/Laser Mark, Plating/Anneal Bake, DTFS, Ball Mount/Reflow, Package Mount/Saw, AOI/FVI, Pack). Oct'21 - Present: - Expand responsibilities to lead EOL equipment engineering team.

Cu Wire Bonding Development Section Manager

Fairchild - now part of ON Semiconductor

2011 - 2014 · 3 yrs

Penang, Malaysia

Manage Cu WB Development team that consists of 5 headcounts (up to staff engineer level). - Establish new Cu WB capabilities on various bond pad metallization, packages types & wire sizes for future technology capability enhancement. - Responsible for Penang plant Cu conversion & cost saving program. 1x Technical Paper Publication & Oral Presentation in IEMT Conference.

Assembly Manufacturing Senior Engineer

Infineon Technologies

2006 - 2011 · 5 yrs

Wuxi, Jiangsu, China

- Project manager for Discrete packages transfer from Malacca plant. - Cu WB start-up for Discrete packages at Wuxi plant. - Technical project leader for cost savings, 2nd source & productivity improvements projects. 4x Technical Papers Publication & Oral Presentation in CSTIC & EPTC Conference. 1x IP (IPCOM000171103D) Publication in Prior Art Database.

Package Quality & Reliability Senior Engineer

Intel

2005 - 2006 · 1 yr

Penang, Malaysia

- Responsible for HVM packages (PBGA & FCBGA) quality & reliability for Chipset division at Intel PG6/7 factories. - Q&R representative for PG6/7 factory Change Control Board. - Involvement in ICH8 Chipset product release. - Manage factory excursion Q&R risk assessment perspective.

Assembly Process/NPI Engineer

Fairchild - now part of ON Semiconductor

2003 - 2005 · 2 yrs

Penang, Malaysia

- Responsible for DA & WB processes for MLP & leaded packages. - Drive optimization, yield/quality improvements projects. - Support new package & product introduction projects.

Assembly Process/NPI Engineer

Globetronics Technology Bhd

2002 - 2003 · 1 yr

Penang, Malaysia

- Responsible for Chip on Board packages FOL processes. - Drive DA & WB yield/quality improvements projects. - Early involvement on new package process optimization.