Youming Liu

Senior Manager

About

1. 13 years of semiconductor industry experience in DIFF, RTP, Laser Spike Anneal and implant process; 2 years of experience of solar research. 2. Deep understanding of process mechanism and characterization methodology. 3. Experience and knowledge in process development, process setup, SPC chart setup and maintenance. 4. Lead trouble shooting and root cause analysis effect to resolve process reliability and yield issue. 5. Familiar with 40LP, 40G and 40/55 NVM process integration and flow. 6. Strong team building and technical expertise to develop collaboration solutions. Capable of influencing the organization to make decision align with strategies. 7. Excellent verbal written communication skill. 8. 8 SCI paper, 30+ patents, 3 trade secrets.

Country

City

Singapore

Industry

Semiconductors

Skill

Semiconductors, CVD, PECVD, Thin Films, Failure Analysis, Process Integration, Design of Experiments, Characterization, Silicon, Semiconductor Industry, Solar Cells, PVD, Semiconductor Process, Diffusion, Simulations, Sputtering, Metrology, JMP, Device Characterization, CMOS

Experience

Senior Manager

青岛芯恩集成电路有限公司

2018-9 - Present · 8 yrs 1 mo

Member of Technical Staff

GlobalFoundries

2011-9 - 2018-7 · 6 yrs 11 mos

singapore

TD-AMTD/DIFF-IMP 1. Familiar with 40LP, 40G and 55/40NVM process flow. 2. In charge of RTP, laser spike annealing, Diff and implant process development, process setup and SPC chart setup and maintenance. 3. Deep understanding of pattern loading effect of spike annealing and LSA on device performance. 4. Study of thermal impact on poly grain size.

Principal Engineer

Applied Materials

2009-11 - 2011-9 · 1 yr 11 mos

1. Crystal Si cell, selective emitter, emitter wrap through (EWT), double printing technology. 2. Take charge of integration/diffusion process development of Generic cell and emitter wrap through (EWT) from line start up. 3. Establish modeling of power loss for printing/screen pattern and diffusion process optimization. 4. Familiar with PC1D simulation for device analysis optimization.

Senior Engineer

SMIC

2005-11 - 2009-11 · 4 yrs 1 mo

Wet clean/IMP/DIFF process 1. Owner of BEOL single wafer clean; backside clean, ST250 polymer removal, CLK888 dual clean, Bevel clean process, etc. 2. Develop all wet strip PR implanted by high energy dose to reduce silicon recess and dose loss of LDD. 3. 45LP core gate process development. Owner of thermal process including well annealing, spike anneal and LSA. 4. Solve CA-PC overlay issue caused by LSA.