Ya (Harley) Yin
Senior ASIC Engineer @ NVIDIA
About
Work hard. Think differently.. Live happily...
United States
Santa Clara
Electrical & Electronic Manufacturing
VHDL, Matlab, Verilog, ModelSim, Cadence Skill, Cadence Virtuoso, C++, C, Xilinx ISE, VLSI, Computer Architecture, Unix, Synopsys Primetime, Design Compiler, Conformal LEC, Tcl, Makefile, Cadence, Perl, RTL Design
Experience
Senior ASIC Engineer
NVIDIA
San Francisco Bay Area
Design For Test Engineer
Intel
Fort Collins, Colorado Area
- Lead development for IEEE-1687 compliant Scan&clock Validation content, used by numerous projects; provided continuous customer support for test debugging and environment bringup. - Worked on various DFT IP development, including RTL coding, design verification, and IP packaging; Delivered high quality IPs in a timely manner used by different customers.
Lab Grader (EE457)
University of Southern California
*Assisted students with their lab assignments debugging; *Graded labs and exams of 140 students in Unix environment throughout the semester.
Education
University of Southern California
Electrical Engineering
Huazhong University of Science and Technology
Electrical and Electronics Engineering
Ya (Harley) Yin's Contact Information
Phone
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