Scott Gaskins

Scott Gaskins

Product Engineering Manager @ Siemens EDA (Siemens Digital Industries Software)

About

Design For Test - ATPG, MBIST, and LBIST, 1149.1, 1500, 1687 iJTAG * Design Synthesis and test logic insertion & verification. * Advanced test methodologies for mixed language designs. * Manufacturing test pattern development and silicon bring up. * Logic design techniques for improving design testability and diagnosability. * Project coordination and technical team leadership. * 3-D Stacked Die test structures and techniques * At-speed Test, Static and Random Resistant Fault analysis expertise.

Country

United States

City

Durham

Industry

Semiconductors

Skill

Cadence Software, TCL, ASIC, ATPG, DFT, VHDL, Perl, VLSI, Verilog, Embedded Systems, Debugging, Cadence EncounterTest, Technical Leadership, Testing, Microprocessors, Logic Design, IC, SoC, Semiconductors, Presentation Skills

Experience

Siemens EDA (Siemens Digital Industries Software)

Product Engineering Manager

Siemens EDA (Siemens Digital Industries Software)

LinkedIn
2024-11 - Present · 1 yr 11 mos
Cadence

Sr Principal Design Engineer - AE

Cadence

LinkedIn
2013-8 - Present · 13 yrs 2 mos

Cary, North Carolina, United States

Cadence

Sr. Principal Solutions Engineer

Cadence

LinkedIn
2019-1 - 2024-11 · 5 yrs 11 mos

Cary, NC

Cadence

Staff Solutions Engineer - AE

Cadence

LinkedIn
2018-7 - 2019-1 · 7 mos

Cary, NC

Cadence

Principal Design Engineer

Cadence

LinkedIn
2013-8 - 2018-7 · 5 yrs

Cary, NC

Scouting America

Troop 451

Scouting America

LinkedIn
2011 - 2015-10 · 4 yrs

Durham, NC

Troop committee member & Committee secretary. District webmaster.

Scouting America

Pack 495

Scouting America

LinkedIn
2008 - 2011 · 3 yrs

Durham, NC

Involved Parent, Committee member, Pack Webmaster, Fundraising coordinator

IBM

Electrical Design and DFT Engineer

IBM

LinkedIn
2000-9 - 2013-7 · 12 yrs 11 mos

Development of Manufacturing Test for advanced IBM server ASIC and high performance processor products.

GE Fanuc

Electrical Design Engineer

GE Fanuc

1994-1 - 2000-9 · 6 yrs 9 mos

Charlottesville, Virginia

Embedded system design engineer & Team Lead * Low power embedded processor (SOC) systems design * EMC Compliance & Testing * Six Sigma certification with project in improvement of manufacturing line inspection operations

BNR (now Nortel)

Hardware Engineering Co-op

BNR (now Nortel)

1989-6 - 1992-12 · 3 yrs 7 mos

Research Triangle Park, NC

Worked in the design engineering hardware lab. Developed firmware for Motorola 68HC705 microcontroller SONET laser pack. Ported 'Forth' programming language for diagnostics and hardware debug on several prototype processor cards.

Education

North Carolina State University

North Carolina State University

LinkedIn

Electrical Engineering

1988 - 1993 · 5 yrs

Scott Gaskins's Contact Information

Email

******@***.com

Phone

(**) *** ****

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