Wei liu

- Cyber resilience act (CRA) relative activities. - Lead activities for FuSa(ISO26262) and Cybersecurity (ISO21434/UNR-155), SUMS( ISO24089/UNR-156) process institution and improvement. - Lead a confirmation measure team to carry out confirmation measures, including confirmation review, functional safety audit and functional safety assessment including Sys/HW/SW. - QA activities.

1. FuSa (ISO26262) related activities: ・2020 - Improved guidelines, templates, checklists for software functional safety development to comply with ISO 26262: 2018 edition: Safety plan, Tailoring sheet, Architecture design, Unit Design, Testing, Safety case, etc. - Filled the ISO26262: 2018 requirement ID in guidelines, templates, and checklists of software functional safety development. Then analyzed and addressed compliance coverage for ISO26262: 2018. ・2021 - Present：Cooperative activity between functional safety software process and security software process 2. Cyber Security (ISO/SAE 21434) related activities: ・2021 - Derived issues (considering cooperation with FuSa) and created guidelines, templates, checklist of software security development to comply with ISO/SAE 21434: Security plan, Architecture design, testing, Security case, Security guide (Requirements for post-development) etc. - Create SBOM (Software Bill of Materials) template and guideline based on SPDX-lite specification of SPDX v2.2 Appendix VIII (CPE: Common Platform Enumeration is also involved) - PSIRT monitoring: Auto-ISAC information monitoring ・2022 - Propose of distribution system including electronic signature and SBOM when distributing products to customers. Construct a demonstration environment - Acquisition of NIST CAVP test (AES mode ECB, CBC, CFB, OFB, Counter mode, etc., electronic signature ECDSA, RSA, HMAC, SHA1 / 2/3, DRBG, etc.) - Continuous improvement of software security development process (gather and solve problems from development teams) - UNR155 CSMS support (association with existing processes, description of arguments, etc.) - PSIRT monitoring: Auto-ISAC information monitoring, CVSS (Common Vulnerability Scoring System) monitoring

Developing the next generation e-AI (Embedded-Artificial Intelligence) solution, such as failure prediction, voice/image cognitive solutions. -Evaluated some chip vendors AI features and performance such as Cadence, CEVA. -AI algorithm research, such as CNN、R-CNN、Fast R-CNN、Faster R-CNN、AlexNet, VGG16, Network in Network, GoogLeNet、MobileNet, ShuffleNet, YoLo、YoLov2、YoLov3、SSD、RNN、SVM、ReLu、Softmax、Sigmoid、Pooling (Max/Average). -Do some AI algorithm research by using TensorFlow. -Design and implement e-AI Translator which can convert and divide the ONNX model to the edage chip.

-Designed and implemented a media access control demonstration system for Renesas DevCon Japn 2017. This demo can real time detect and drop the attack packets which are forwarded with the on-demand video packets by using Renesas Network Search Engine (NSE) TCAM and Xilinx SDNet®Packet-Processing Platform (Virtex UltraScale FPGA). -Designed and implemented 400Gb/s TCAM table searching and power consumption monitor demonstration system for Renesas DevCon China 2016 by using Renesas Network Search Engine (NSE) TCAM and Xilinx VCU110 board. -Demonstrated the above solutions and systems to customers and got their feedback. -Demonstrated Renesas’s product and solution to customers and specify customers’ feedback and new requirements. -Designed and implemented the driver software, basic application software for the next generation NSE. -Found a way to save the same IPv4 and IPv6 address information by using 1/4 to 1/16 space, and reduced the power consumption to 1/16. -Designed and implemented a pure software C++ simulator (model) for the next generation NSE silicon. Software developers can use this C++ functional model to evaluate customer’s software features in their local software developing environment without any silicon. -Designed a 5-tuple (a source IP address/port number, destination IP address/port number and the protocol) ACL demonstration system. This demo can provide 400Gb/s Network Access Policy Control and Malware Detection by using Renesas Network Search Engine (NSE) TCAM and Xilinx SDNet®Packet-Processing Platform (Virtex UltraScale FPGA).

-Embedded software developing (Basic software design, feature software design, combined testing, bug tracing and solving, quality analysis, schedule management, team management) of various broadband access systems and core network systems for telecommunications carriers in United States and Japan. And delivered the software on time with quality assured, error-proof which had no any field bugs. Developed embedded equipment included ONU, OLT (Control Card, Line Card, Switch Card). -Led developing teams of up to 15 members. -Assisted to manage project: Introduced and tailor XDDP process, improved software quality and the developing efficient to specification tracing and solving bugs. -Two patents: P5785906, P5523861 -Prize Technology Awards of the Telecommunications & Network Systems Division. Key Project: -May 2013-Februray 2016: Embedded software developing of a packet optical transport core network system (AMN6400) for telecom carrier in Japan. -May 2011-April 2013: Embedded software developing of VPN system (AMN1710) basing on MPLS-TP (Multiprotocol Label Switching - Transport Profile) technology for telecom carriers in Japan. -Was promoted to Engineer (技師) in April 2009. -April 2008-May 2009: Embedded software developing of MPLS-TP broadband access system for telecom carriers in Japan. -April 2006-March 2008: VoIP embedded software developing of G-PON (Gigabit-capable Passive Optical Networks) system for carriers in America.

-Addended ITU-T’s official meeting and discussed with other members about the latest proposal and contributes. -Got the latest G-PON (G.984) relative specification, such as OMCI (G.984.4, Optical network termination Management and Control Interface) and fed back to the product’s design. -Made and presented original 13 contributes about OMCI, and some of them were adopted by the G.984.4 standard.

As an expatriate emplyees from Hitachi Ltd. Salira is a sub-subsidiary complany of Hitachi. -Offshore embedded software developing project management of D-PON (DOCSIS-PON, Data Over Cable Service Interface Specifications) system for the cable TV companies in America. -Managed developing teams of up to over 40 members. -Improved the communication of projects composed of members from multiple offices (China, Japan, America). -Rebuilding developing process and got the CMMI certification (Level 3). -Brought up offshore developing team for the division in Japan. -Import/Export control among China, Japan, America. -Prize Technology Awards of the Telecommunications & Network Systems Division. Key Project: -June 2009-April 2011: Offshore embedded software developing project management of D-PON system for the cable TV companies in America. -February 2010-April 2011: Offshore embedded software developing of broadband access equipment.

Japanese Government (Monbukagakusyo) Scholarship (2004.4-2006.3) JASSO Scholoarship (2003.4-2004.3)

JASSO Scholoarship (2001.4-2003.3)

Excellent Graduate Student of Zhejiang University (1998.6) Wang Guosong Education Fund Scholarship (1998.4) Zhejiang University Scholarship (1997.11) Zhejiang University Scholarship (1996.12) Zhejiang University Scholarship (1995.12)