Wei Li
Senior Principle Engineer, Atom CPU DFT and DFD Architect and Team Manager @ Intel
United States
Austin
Electrical & Electronic Manufacturing
Verilog, ATPG, BIST, DFT, TCL, Static Timing Analysis, Primetime, SoC, RTL design, Timing Closure, RTL coding, Formal Verification, C/C++, ASIC, EDA, Processors, Debugging, Testing, Semiconductors, Low-power Design
Experience

Senior Design Engineering Lead
DFX Architect of ATOM CPU core as well as ATOM based SOC products such as Lincroft and Penwell. Responsible for the array DFT, scan DFT, clock gating as well as DFT based debug features from feature definition, architecture to the implementation.

Graduate Student Intern Researcher
NEC
Princeton, New Jersey
Working as a PhD graduate researcher in NEC Research Lab and co-invented a noval low cost methodology for at-speed testing in SOC architecture.
Education
Wei Li's Contact Information
Phone
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