Vladimir Feinberg
Distinguished Engineer @ Google DeepMind
About
I enjoy working at the intersection of ML and systems to create practical software that helps us do our jobs. My blog (monthly ML or programming pearls): https://vladfeinberg.com Long-form ML thoughts and notes: https://github.com/vlad17/ml-notes
United States
New York
Computer Software
Python, Data Science, Software Engineering, Computer Science, Statistics, Mathematics, Algorithms, Unix Shell Scripting, Software Design, Distributed Systems, Mathematica, LaTeX, Java, R, C++, Real Analysis, Linear Programming, Concurrent Programming, OCaml
Experience
Staff Software Engineer
San Francisco Bay Area
Oct 2021 to Jul 2022 Google Research Cerebra Quantization for Ads DNNs, Software/Hardware codesign. Developed a static, calibrated quantization library and pushed for ads integration & compiler support to achieve XX% latency for click-through rate prediction models. Jul 2022 to Apr 2023 Google Brain, Algorithmic Efficiency Developed new quantized training technques for XX% LLM training speedup. Second-order optimization algorithms research (see NeurIPS paper, Sketchy, below) Apr 2023 Google DeepMind Led finetuning for initial Bard launch, earning a spot bonus from Jeff Dean. Led pretraining & finetuning & RLHF for several PaLM2 sizes (https://ai.google/static/documents/palm2techreport.pdf), earning company-level recognition (Google Tech Impact Award) Led architecture & training for Codey v2 model (Nature acknowledgements: https://www.nature.com/articles/s41586-023-06924-6, launched in https://blog.google/technology/developers/google-colab-ai-coding-features/, https://blog.google/products/search/search-labs-ai-announcement-/, and https://cloud.google.com/blog/products/application-development/introducing-duet-ai-for-developers). Co-led training for distilled on-device generative AI models used in the launches described by Rick Osterloh (https://youtube.com/clip/Ugkx3wQZoi0fudU06amUzEbH8UhTxGOaXTku?si=KhIkZgYbls3yFCFI) Currently Gemini, focussed on efficient large multimodal model training & serving.

Head of Machine Learning
I have contributed to the Sisu Diagnostics Platform as the first engineer and led our machine learning effort as the Head of Machine Learning. I have worked on scalable inference methods to explain drivers behind customer key performance indicators by building a new automated inference engine with false discovery control for high-dimensional sparse settings via a custom-built optimizer for a hard-fought 10x improvement over Vowpal Wabbit. My management contributions have been leading ML product roadmap, creating an ML team from scratch by hiring IMO medalists, ICML authors, math professors with articles in Transactions of the AMS, and training via biweekly reading group: https://sisudata.com/blog/learning-unsupervised/

Machine Learning Intern
San Francisco Bay Area
Spark MLlib team. Implemented Spark Catalyst primitives to make online machine learning possible in a streaming environment. Created a proof-of-concept with online adaptive gradient descent with feature hashing for binary logistic classification. Also created keyed models for distributed training in spark-sklearn.
Software Engineering Intern
Mountain View
Cloud Dataflow team. I created and instrumented a Spanner instance for profiling workflows for optimization and auto-scaling, which speeds up execution by enabling better scheduling (up to 15% speedups). I also instrumented a critical path metric for workflows (DAGs of execution steps and dependencies), and patched deadlock-y shutdown sequence orchestration.

Data Storage Intern
San Fancisco, CA
Kudu team. I increased scan speed with query codegen (up to 2x speedup) and concurrent B+-tree prefetches (up to 1.5x speedup), used knapsack for compaction optimization (20x speedup), and worked on the client-side API as well. Over winter break, I reduced the number of server-side copies by augmenting the RPC mechanism with side buffers.

Software Engineering Intern
Silicon Frontline Technology
Campbell, CA
Applied computational geometry for electronic design automation: implemented Fortune's algorithm for Voronoi diagram generation on large chip design point map inputs, used to accelerate voltage calculations with nearest neighbor queries.
Vladimir Feinberg's Contact Information
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