Violet (Wanlin) Jiang
PhD Candidate @ University of Toronto
Canada
Toronto
Semiconductors
Cadence Virtuoso Layout Editor, Power Electronics Design, Printed Circuit Board (PCB) Design, Project Management, Level Design, Layout Tools, Analog Layout, Parasitic Extraction, Presentations, Design Review, Power Delivery, Analog Semiconductors, Written Communication, Launch Products, Design Documents, Computer-Aided Design (CAD), Cadence, C++, Verilog, Engineering
Experience
PhD Candidate
University of Toronto
Toronto, Ontario, Canada
Research focus: dc-dc converters for automotive ICs, GaN monolithic integration Teaching assistant: ECE349, ECE314, ECE231, ECE295
Analog Circuit Engineer Intern
NXP Semiconductors
Chandler, Arizona, United States
Analog Design Engineer
Analog Devices
Colorado, United States
Design and evaluate ICs for next-generation precision power supply and measurement units.
Project Management and Control Intern
Ontario Power Generation
Ontario, Canada
Protection and Control Co-op
Hydro One
Toronto, Ontario, Canada
Education
University of Toronto
Electrical and Electronics Engineering
University of Toronto
Electrical and Electronics Engineering
Thesis: Comparative Analysis and Demonstration of Monolithic-Integration in High-Voltage Gallium Nitride Processes
University of Toronto
Major in Electrical Engineering; Minor in Engineering Business
Specializations: Power Systems, Control Systems, Electronics
Violet (Wanlin) Jiang's Contact Information
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