Valentin A.

Principal Engineer/IC8, operated as a technical lead for fleet-wide AI compute performance - I helped driving AI/GPU efficiency from the trenches. I spent more than 70% of my time with deep hands-on work across the whole stack: optimizations to platforms, Linux, CUDA kernels, PyTorch, AI frameworks, model code and supporting services; debugging performance and reliability issues in large scale distributed training; model hw-sw co-design; research and prototyping on next-gen AI infrastructure. On the directional front I drove efficiency initiatives, I guided our performance tooling and observability infrastructure, defined metrics and goals across divisions, contributed to capacity management decisions, drove mentoring and structured knowledge sharing. Notable Projects: - Optimized tens of AI workflows and adjacent AI infrastructure components hands-on or during my office hours - Built Meta's AI applications performance observability infrastructure - Implemented SotA mitigation of DC level power transients in hyperscale GenAI pre-training - Developed and deployed an industry first sched-ext Linux scheduler optimized for AI training - Worked in PyTorch and helped optimize and bring-up Grace-Blackwell platforms in our fleet

I transferred to US and continued as a technical lead focusing on CUDA and OpenCL accelerated workloads (HPC and AI). Within the scope of my work were performance analysis, software optimizations, benchmark development, simulator development and systems modeling. I was a member of a core business division where we proposed processor micro-architecture improvements, set performance targets and made product roadmap decisions. I co-authored 12 patent applications.

I was a technical lead, patent mentor and academic program coordinator for our platform analysis division. I seeded and ramped up 2 performance characterization teams that grew to more than 30 engineers. The scope of our work was platform performance analysis and characterization, software optimizations, system performance modeling and developing tools, benchmarks and simulators.

I taught a BSc laboratory of x86 Assembly Language and a Masters course of Micro-controllers & Embedded Systems. I was also an active member in a NATO Science for Peace university project, aiming research and scoping for the IEEE 802.21 standard.

We developed a biometric pen used for account authentication based on unique hand movement during signature acquisition. We used ML back then and I implemented a C++ AI framework responsible for the entire pipeline of training, checkpointing and serving the model. I also designed and implemented CUDA acceleration to our backend authentication service.

First individual technical contributor of the company - a computational biotechnology startup based in Valencia, Spain. I designed and developed the prototype for our first product: an FPGA accelerator for genomics sequence alignment. With it, Celeromics won 5 research grants and was named the 2008 most promising startup in the Valencia technology hub.

Research on overlapped speech analysis using deep learning and signal processing. My thesis is titled "Contributions to Computational Methods in Auditory Scene Analysis for Automatic Speech Recognition".