Vaibhav Saini
CPU Validation Engineer @ Intel Corporation
India
Bengaluru
Computer Hardware
Debugging, Universal Verification Methodology (UVM), Verilog, Cadence Virtuoso, TCAD, MATLAB, C (Programming Language), Computer Architecture, Operating Systems, Assembly Language, Data Structures, C++
Experience
CPU Validation Engineer
Intel Corporation
Bengaluru, Karnataka, India
Postgraduate Student
DiRac Lab
Roorkee, Uttarakhand, India
Research Assistant
CSIR-CEERI
Pilani, Rajasthan, India
Education
Indian Institute of Technology, Roorkee
Microelectronics and VLSI
Birla Institute of Technology and Science, Pilani
Engineer physics and Electronics
Birla School ,Pilani
science
Vaibhav Saini's Contact Information
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