Umesh Patel
Founder and CEO @ Arastu Systems, Inc.
About
Seasoned Enthusiastic Executive with deep experience in driving product growth with innovative strategies for the various market. Contributed to many successful silicon valley startups in the field of semiconductor, embedded, software application systems from last 24 years where I engineered and managed products for better price and performance. Building and executing cohesive strategy across product engineering, sales, marketing and delivery, pursuing very aggressive growth targets year over year.
United States
San Francisco Bay Area
Semiconductors
Requirements Analysis, Business Analysis, Verilog, TCL, PCIe, Perl, SPI, SATA, DDR, XAUI, ASIC, SoC, Logic Synthesis, Static Timing Analysis, FPGA, Semiconductors, Ethernet, I2C, RTL design, IC
Experience

Founder and CEO
San Francisco Bay Area
Arastu Systems is a passionate engineering company to provide Semiconductor and Software Engineering Services. We are in the business of Product Engineering Services for Hardware and Software. Our Software business has been in a unique position to provide comprehensive Digital Platform for IoT, where things, services and data come together to provide newer insight and experience. Get in touch with me at umesh@arastusystems.com We are working on very interesting projects. Indeed fun time. https://www.linkedin.com/company/arastu-systems

Director, ASIC IP Solutions
I was responsible for IP Business. I was involved in day to day marketing and sales activity to manage expectation and effective ASIC business execution. Also, my team was involved in development and deployment of various complex interface IPs and ASIC SOC service projects. We managed to grow semiconductor IP revenue from almost zero to multi-million dollars. Sibridge VIP business was acquired by Cadence Design Systems.

Director
Glabs, Inc
San Francisco Bay Area
Founding member of ASIC/FPGA Lead Firm with Consultants Semiconductor SOC Architecture and Design for next generation multimedia chip. Managed many SoC project with complex peripherals like PCI express, 10G Ethernet, USB, SAS etc.

Principal
Teranetics
San Francisco Bay Area
As one of the few member of Teranetics startup team to grow business from 10G Copper Ethernet PHY to Satellite communicate products. I was success part of semiconductor team to deliver multiple version of Chips in various processes from 130nm to 28nm Teranetics was acquired by PLX Technologies.

Design Application Engineer
San Francisco Bay Area
Interacted with the customer base to provide advanced technical consulting knowledge, like to develop methodology for ASICs and FPGAs according to the customer’s applications. Expert Consultant for Design Compiler, Test Compiler, FPGA Compiler / Express, Primetime, Library Compiler, Floorplan Manager, VHDL(HDL) compiler Synopsys Tools.
Umesh Patel's Contact Information
Phone
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