Tsen-Yen Hsiao
GPU RTL Design Engineer @ Qualcomm
About
Hello, my name is Tsen-Yen Hsiao. I received my bachelor's degree in Computer Science from National Yang Ming Chiao Tung University in Taiwan. Currently, I am studying VLSI and Computer Architecture at University of Michigan. I am interested in Computer Architecture and Digital Circuit Design.
United States
San Diego
Information Technology & Services
Cache Coherency, Computer Architecture, System Verilog, RISC-V, SystemC, Deep Learning Architecture, RISCV, 電腦架構, Digital Circuit Design, 微處理器, C++, 超大型積體電路 (VLSI)
Experience
GPU RTL Design Engineer
Qualcomm
聖地亞哥地區
GPU Design Team
CPU RTL Design Engineer Intern
AMD
美國 紐約州 Fishkill
CPU Design Team
Undergraduate Research Assistant
National Chiao Tung University
台灣 Taiwan 新竹市
@ Computer Architecture Systems Lab • Extended the gem5 simulator for RISC-V vector instructions to validate the vector processor
Undergraduate Research Assistant
National Chiao Tung University
台灣 Taiwan 新竹市
@ SoC/ ESW Lab Deep Learning Accelerator Architecture Simulation with Timing Analysis • Collaborated with three other members to design and build up three different types of synchronous deep learning accelerator architectures – single stage in-order, pipeline in-order, and out-of-order execution with shared memory • Focused on the architectures of operator function unit and different ways of data transfer and communication mechanism between modules
Education
University of Michigan
Electrical and Computer Engineering
• Subfield in Integrated Circuits & VLSI • Coursework: Computer Architecture, Parallel Computer Architecture, Micro-architecture, VLSI I, Advanced Compiler, VLSI for Comm and ML
National Chiao Tung University
Computer Science
• Cross-Disciplinary Specialty in Electronics and Electrical Engineering • Rank: 6/199 • Coursework: Computer Organization, Microprocessor Systems, Intro to VLSI Design, Digital Circuit Design, VLSI Lab, Digital Circuit Design Lab, Embedded System Capstone
Tsen-Yen Hsiao's Contact Information
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