Todd Farrell

Memory Technology focus for Leading Edge Architecture Pathfinding group in Azure/SPARC organization. Focus on DRAM technologies including HBM, LPDDR, DDR, GDDR, and custom.

Current JEDEC Board of Director member representing Microsoft Corporation; Feb. 2021 - Present

• Board of directors for several standards organizations (JEDEC, OpenCAPI, and Gen-Z) • Primary Standards representative for above plus MIPI Alliance, Open Power, and CCIX • Technical Leadership Program (TLP) Review board for Systems Expertise • Lead DDR5 architecture team working with ecosystem partners • Defined roadmap of components, modules, and support devices (Registers, PMIC, Buffers and Hubs)

• Led multiple teams including Applications Engineering Team (factory memory experts), Ecosystem Partners (including CPU, GPU, ASSPs, FPGA) for Compute and Networking Business Unit • DRAM Architecture and product definition for several DRAM projects both custom and industry standards including DDRx, RLDRAM, HMC, and support of GDDR, HBM, and LPDDR • Memory Module development and support of all DIMM products (UDIMM, SODIMM, L/RDIMM) • Memory channel SI simulations, module and component power, performance modeling, and PDN analysis • HMCC Standards development; created and established a new HMC consortium, workgroups to drive PHY and Protocol specifications and ecosystem development. High speed SerDes SR-15 and VSR-30 products defined with 3DI packaging including TSV /w heterogeneous mix of Logic foundry and Dram foundry. Custom 3D stack memory for Intel Xeon PHI product.

• DDR4 product/roadmap definition, all DRAM features, functions, parametrics, and module development • DDR3 product/roadmap definition, all DRAM features, functions, parametrics, and module development • Multiple Innovation projects outside of JEDEC standard memory products • JEDEC Technical Recognition award 2007 for JESD79-3 (Author of DDR3 full specification JESD79-3)

• Promoted to Senior member of Technical Staff (Technical Leadership Program) • DDR3 product definition/roadmap, all DRAM features, functions, and parametrics, and module dev. • DDR3 chair of JEDEC AC Parametrics task group and several others including SI and Packing TG’s

• DDR2 product definition, all DRAM features, functions, and parametrics • Author of both internal design specifications and external customer product datasheets • DDR2 vice-chairman of JEDEC JC42.3c Committee and Chair of multiple DDR2 Task Groups • Responsible for PC100/PC133 SDRAM products and Rambus RDRAM PC600-800 • Author of several external DRAM datasheets used for customer support and design-in

• Initial core team start-up for motherboard development and production at Micron Technology • Hired and managed a 35+ team over a 3 year period with a $2.5M budget across multiple sites • Responsible for overall product roadmaps and selection of all silicon components including cpu, memory, audio, GPU, I/O, and networking components • Full motherboard design including verification and validation for schematic capture, board layout, BIOS, software drivers, and high-speed simulation environments for cpu and memory subsystems • Setup and managed multiple labs including motherboard compatibility lab, customer qualification lab, and regulatory FCC/EMI labs • Successfully developed, implemented, and passed audits for product development to ISO9001 standard

• Founding member of Crucial Technology start-up, a division of Micron Technology • Responsible for Technical Support team, training, and software tool development • Author of original PC memory upgrade configuration tool using FoxPro database • Setup compatibility lab and qualification process for module upgrades

• Micron PC Division - Lead (25+ team) for both product qualification and compatibility labs for Client and Server based systems • Created and deployed in-house automated software download system to improve hardware and software qualification process for Engineering Lab and also leveraged this to a full scale OEM PC production environment that included 16 Novell SFT III server platforms serving 800 simultaneous clients with dynamic software configuration of Windows 95 and Windows NT based systems • Product development lead for both Client and Server market segments of x86 systems • Several awards and Editor’s choice for PC Week, PC Magazine, and Computer Shopper

• Product development lead for high performance x86 CAD Workstations and Servers • Several awards and Editor’s choice for PC Week, PC Magazine, and Computer Shopper