Rajamani Sethuram

Rajamani Sethuram

Custom CPU DFT @ Qualcomm

About

Back at grad school, when I defended my dissertation on test cost reduction and test quality improvements little did I knew the scope and impact of DFT on the overall chip design and productization cycle. Looking back on the 15+ years of implementing and leading DFT for socs ranging from cellphones, datacenter, AI, and automotive chips, I can vouch that innovation in DFT is super critical to the success of silicon - from design quality to product time-to-market, it affects everything. Juxtaposed between design and silicon engineering team, I have driven successful tapeouts, silicon bringup, and enabled product and test engineering teams for a smooth ramp-up to production. I have many years of experience developing EDA tools and methodologies, DFT architecture and implementation that resulted multiple patents and several publications. I have lead global teams implementing DFT for very large SoCs. My tenets for leading team are: a) direct and effectively communicate risks, dependencies, and critical DFT metrics, b) lead with energy, passion and curiosity to help bring the best out of engineers, and c) aspire, innovate, and never settle for less to deliver best-in-class DFT solution at the speed of light!

Country

United States

City

San Jose

Industry

Computer Hardware

Skill

EDA, Cadence Virtuoso, Perl, Primetime, Static Timing Analysis, Shell Scripting, ATPG, Vera, RTL verification, Digital Electronics, Testing, SystemVerilog, ASIC, Verilog, TCL

Experience

Qualcomm

Custom CPU DFT

Qualcomm

LinkedIn
2023-4 - Present · 3 yrs 6 mos
Qualcomm

Principal Engineer/Mgr

Qualcomm

LinkedIn
2023-4 - Present · 3 yrs 6 mos

Santa Clara County, California, United States

Google

DFT Hardware Engineer

Google

LinkedIn
2022-7 - 2023-4 · 10 mos

Mountain View, California, United States

NVIDIA

Principal Engineer

NVIDIA

LinkedIn
2018-7 - 2022-7 · 4 yrs 1 mo

Santa Clara, California

At Nvidia, I had the privilege to lead a world-class global team of DFT engineers delivering state-of-the-art DFT solution for automotive, gaming, and industrial automation chips (https://bit.ly/3nOKrwi). Extremely proud to have been part of the team that is changing the future of autonomous vehicle industry (watch https://bit.ly/3ABt1ee)

Qualcomm

Sr. Staff Engineer

Qualcomm

LinkedIn
2007-6 - 2018-7 · 11 yrs 2 mos
North Carolina State University

Teaching Assistant Professor

North Carolina State University

2016-8 - 2016-12 · 5 mos

Raleigh-Durham, North Carolina Area

Digital Logic Design at the ECE dept. of NCSU

NEC Research Labs

Research Assistant

NEC Research Labs

2005-2 - 2007-7 · 2 yrs 6 mos

Research related to Test cost reduction for Structured ASICs and regular cell-based ASICs

Rutgers University

Graduate Research And Teaching Assistant

Rutgers University

LinkedIn
2002 - 2007 · 5 yrs
Synopsys Inc

R & D Engineer II

Synopsys Inc

LinkedIn
2001-6 - 2002-7 · 1 yr 2 mos

Compiler development, software for VERA Verification engine

Education

Rutgers University

Rutgers University

LinkedIn

Computer Engineering

2002 - 2008 · 6 yrs
Indian Institute of Technology, Roorkee

Indian Institute of Technology, Roorkee

LinkedIn

Computer Science

1997 - 2001 · 4 yrs

Rajamani Sethuram's Contact Information

Email

******@***.com

Phone

(**) *** ****

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