Tanvir Manhotra

Member of the ROC group. Responsibilities include: DMA block • Working on certain design and architectural aspects of DMA engine block . • Worked on increasing the performance. • Implemented PF/VF mailboxes for communication between PF and VFs. • Worked on adding the hardware capabilities to handle software errors. PCIe block • Worked on creating configuration, building and integrating Vendor IP PCIe Cores for various configurations. CSR RTL development and support • Supporting the RTL generation tool for CSRs for all blocks on the chip. • Adding multiple new features based on user feedback, debugging unique failures and helping users add the correct information to generate the CSRs. • Worked on making changes to the script to create better way of decoding CSR transaction for various blocks under a subsystem.

Member of the Autopilot Hardware Team for Design Verification Responsibilities included: • Reviewing the coverage plan with RTL designers and architects. • Generating functional coverage by writing coverpoints, immediate/concurrent assertions. • Creating tests for increasing coverage and generating code coverage results for review with designers. • Creating python scripts to automate coverage collection of the instruction sets and merging coverage DBs.

• Develop an understanding of estimating core power using Synopsys PTPX and Ansys Power Artist • Modification of RTL code and architecture to incorporate power reduction techniques in the core blocks. • Creating automation scripts for reporting power using PERL.

Member of teaching team for EE457 - Computer Systems Organization by Professor Gandhi Puvvada for Spring 2019. I am responsible for teaching discussions and resolving student doubts and queries by observing office hours.

Member of the teaching team under Professor Gandhi Puvvada for the term Fall 2018. I am responsible for grading homework and exams as well as resolving queries for a batch of 149 students.

Working as one of the graders for the course under Professor Alice Parker. My responsibilities include grading course homework and labs based on Cadence Virtuoso.

• Worked on handling production and test environment of JD Edwards as a part of Shared Services Project for United Technologies Corporation. • Experienced the nuances of working with multinational team based out of different time zones • Performed setup of batch servers, standalone and clustered webservers for new instances. • Implemented the application server setup for DSI, a label printing solution, integrated with JD Edwards. • Worked on creating use case documents, documents detailing weekly action items for team, Root Cause Analysis for incidents/escapes, mistake proofing solutions viz. DIVE. • Performed general tasks such as user management, security management, batch job scheduling, automated everyday tasks. • Investigated the setup of RUNUBEXML for remote batch job submission through SSIS server.

• Underwent an intensive 3-month training program in JAVA, Web technologies, and Business Communication. • Acquired understanding of Enterprise Resource Planning tool called JD Edwards resulting in subsequent deployment to a project under Oracle Business Unit.

• Developed an understanding of Programmable Logic Controllers (PLCs) and Supervisory Control and Data Aquisition (SCADA) software suite by undergoing practical hands-on training. • Designed ladder programs on twido software suite and GUI based integrated control systems on Vijeo Citect. • Understood the integration of sensors and actuators to form a closed loop system.

Specializing in Computer Architecture and Digital VLSI design.

Completed undergraduate studies in BE Electronics Engineering from Shah & Anchor Kutchhi Engineering College, Mumbai University.