Tanner Shephard

CUDA Driver

Own large C++ micro-architectural simulator used in mulitple validation environments Design and implement microcode for new x86 ISA features Teach multiple courses to engineers throughout our organization: - Software Engineering course focused on techniques and guidelines to write clean, object-oriented, maintainable code. - Modern C++ course focused on teaching engineers who use C++ about features of modern C++ introduced through C++11, 14, 17, and 20, as well as best practices to write concise, well-performant code.

Testbench owner and architect for a core-level pre-si test environment written in C++ and system verilog Refactored legacy C++ code to be more modular, stable, readable, and TLM based to integrate better in an OVM environment. Developed new C++ code for the test environment to enable new types of stimulus and enablement of new RTL features. Created multiple TLM-based monitors that enabled low-level debug visibility, without needing to generate an FSDB, while still keeping checking high level and stable. Led a workgroup focused on improving tools related to bucketing failures. Implemented enhancements that had project wide impact on teams’ workflow and efficiency.

Created a performance monitoring firmware library to enable ASIC design engineers to find performance bottlenecks and firmware development engineers to analyze impact of major firmware changes. This library allows users to monitor both processor performance and bus usage metrics. Also assisted bring-up of a FPGA based prototyping environment through RTL modification and code generation. Gained several months experience as owner of design and verification for several hardware blocks being developed for future ASICs.

Was a member of a design verification team responsible for testing AMD graphics IP. Helped create modular testbench components for pre-silicon block level validation. My responsibilities included creating tools in both Perl and Ruby using Object Oriented Programming, code generation and automation, as well as debugging issues in complex designs. I gained experience with version control, implementing adaptable testbenches for large designs, and advanced debugging techniques.

I was an Electrical Engineering Intern at Rockwell Collins on an FPGA/ASIC team that followed the Agile methodology. I performed hardware testing and verification, debugged various hardware components, created documentation, and participated in peer reviews of schematics, layouts, and RTL code.

Awards/Honors: Dean's List, Academic Excellence, Magna Cum Laude, Who's Who Among Students in American Universities and Colleges