sreenivas jayaraman

director, global manufacturing engineering

About

Technical lead for transfer and ramp of new manufacturing processes and technologies from pilot line to HVM lines globally. Functional and project manager that works across groups spanning process development, manufacturing, supply-chain, training, quality, reliability and product management. Manage a team of engineers and technicians that owns critical constraint tool sets in a 24x7 manufacturing and process developement environment and drove towards aggressive product performance, yield and throughput goals. ASQ certified six-sigma Green Belt; apply DMAIC and Lean Six-Sigma as part of regular job responsibilities. Specialties: Thin Film Engineering, Thin Film Metrology, Physical and Chemical Vapor Deposition, Thermal Processing, Materials Characterization, Six-Sigma, DOE, SPC, DMAIC, Theory of Constraints, JMP.

Country

united states

City

waterville

Industry

renewables & environment

Skill

thin films, semiconductors, pvd, cvd, spc, materials science, jmp, photovoltaics, six sigma, thermal processing, situational leadership, design of experiments, failure analysis, characterization, manufacturing, research and development, metrology, engineering, process simulation, lean manufacturing, integrated circuits

Experience

director, global manufacturing engineering

first solar

2018-1 - Present · 8 yrs 9 mos

senior manager mfg engineering

first solar

2014-1 - 2017-12 · 4 yrs

manufacturing engineering manager

first solar

2012-6 - 2013-12 · 1 yr 7 mos

engineering group leader

first solar

2011-1 - 2012-6 · 1 yr 6 mos

research and development engineer

first solar

2009-1 - 2010-12 · 2 yrs

research engineer

numonyx

2008-4 - 2008-12 · 9 mos

Process technology development and pathfinding towards semiconductor memory manufacturing.

senior process engineer

intel corporation

2005-8 - 2008-3 · 2 yrs 8 mos

A process development engineer focussing on thin film deposition processes including PVD (magnetron sputtering, ionized-PVD) and CVD. Worked in integrated focus teams with members from lithography, etch and CMP to deliver manufacturable process flow solutions for integrated circuits (65 and 45nm nodes). Continuous improvement projects to contain process excursions, reduce cost and improve process capabilities. Electrical and Yield data analyses, correlation to process parameters and generating models to explain end-of-line performance. Update and create operating procedures and documents per ISO requirements. Training the manufacturing techs on new processes, mentoring them towards achieving their personal developmental goals and fostering a cohesive work-environment.

graduate student and research assistant

university of illinois at urbana-champaign

2000-1 - 2005-1 · 5 yrs 1 mo

engineer

tata motors

1999-7 - 2000-6 · 1 yr

Manufacturing Engineer in an Integrated Automobile Production Facility. Brief experience with processes in Forge, Foundry, Heat Treatment and Quality Control/ Failure Analysis Divisions.