Shailendra Rajput

Staff Silicon Architect Lead @ Google

About

Silicon engineering professional having over 15 years of industrial experience. Seasoned technical leader with strong working experience in the capacity of individual contributor and technical leadership roles. Delivering the state of art heterogeneous compute (CPU GPU) Architecture. AI-first silicon: Defining silicon systems requirements and compute architectural pathways to bring user centric AI experiences to life. Delivering solutions to CPU GPU compute performance. Closely working with android applications and AI teams to plan and conduct use cases and benchmark performance analysis to project performance power and area at various design phases. Leading in-depth architectural investigations to define new opportunities for SOC compute performance, efficiency and features enablements. Comprehensive system architecture specifications to map end to end data flows and implementing advanced system-level frameworks and methodologies to accurately forecast performance power and area. On-Device Gen AI System Architecture: Architecting end to end system solutions for deploying advanced Gen AI models to ensure seamless and optimal utilization of the SOC. Translating cutting edge Gen AI research and innovative product ideas into feasible on-device applications. Hardware Aware AI Optimization: Driving system level optimization of Gen AI models and critical user journeys deeply considering the mobile SOC architecture, memory hierarchy and thermal characteristics to maximize performance and user experience. Proven track record in leading CPU subsystem delivery for numerous chipsets spanning across mobile, IOT, wearables, compute & automotive chipsets till successful tapeout & product commercialization.

Country

City

India

Industry

Telecommunications

Skill

gem5 CPU models, Python (Programming Language), Mobile workloads, System level modeling, CPU performance analysis & projection, CPU Performance analysis , CPU microarchitecture, Emulation, CPU Performance , Silicon Engineering , CPUSS DV Lead, CPUSS Validation, Silicon Architecture , Verilog, SystemVerilog, VLSI, Debugging, VHDL, ASIC, Functional Verification

Experience

Staff Silicon Architect Lead

Google

2025-4 - Present · 1 yr 6 mos

CPU GPU AI Compute and ML Accelerators Responsibilities: Lead CPU GPU ML Compute and System Use Cases Tuned Architecture Definition Define and Deliver IP Architecture and Microarchitecture Specifications, perform detailed data analysis to improve use cases driven CPU GPU architecture solutions. Optimize the overall tensor SOC and software stack for CPU and GPU workloads Technical Expertise: 1. CPU Frontend/Backend Microarchitecture 2. CPU ML Accelerator: Arm SME/SME2 ISA and CME Microarchitecture 3. Arm GPU Microarchitecture (Shader core execution units and fixed function accelerators) 4. GPU ML Accelerator: Neural Graphics Engine 5. System Use Cases and Performance Benchmarking

Senior Silicon Architect Lead

Google

2022-6 - 2025-4 · 2 yrs 11 mos

Responsibilities: Lead CPU Performance Modelling and Use Cases Based CPU Architecture Definition. Lead Imagination GPU Architecture Research to boost PPA based on graphics and ML workload analysis Technical Expertise: 1. CPU Frontend and Backend Microarchitecture 2. Imagination GPU Shader Core Microarchitecture (Unified Shading Cluster and Special Function Pipelines) 3. CPU performance benchmarks and critical user journey KPIs 4. CPU PPA, cluster configuration and competitive analysis 5. GPU bound benchmarks and workloads