Shivanshu Rana
Senior Lead RTL Designer @ Qualcomm
About
With over 5 years of experience in RTL design, I specialize in developing scalable, high-performance IPs. My approach includes thorough Power, Performance, and Area (PPA) analysis before implementation, ensuring designs are both optimized and robust.
India
Kurukshetra
Consumer Electronics
RTL Coding, Digital Circuit Design, Verilog, System Verilog, Computer Architecture, Microarchitecture, CDC, RDC, STA, Linting, Data Structures, C, C++, Perl, Shell Scripting, GNU Make, Synopsys tools
Experience
Senior Lead RTL Designer
Qualcomm
Bengaluru, Karnataka, India
Senior RTL Designer
Qualcomm
Bengaluru, Karnataka, India
Mobile Display Sub System RTL Designer
Application Specific Integrated Circuit Engineer II
NVIDIA
Bengaluru, Karnataka, India
BSI IP RTL Designer
RnD Engineer(RTL Designer)
Qbit Labs
Gurugram, Haryana, India
QDMA IP RTL Designer
Freelancer(RTL Designer)
Worked for Startups to deliver Highly Configurable RTL for fundamental design blocks like FIFOs, Datapath for Pipelined Interconnects , Arbiters
Trainee
Mentor Graphics
Bengaluru Area, India
Trainee
Maven Silicon
Gottigere, Bangalore
Education
National Institute of Technology, Kurukshetra, Haryana
Electrical, Electronics and Communications Engineering
Shivanshu Rana's Contact Information
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