Shibao Su
SoC Physical Design Engineer @ Apple
About
Hardware Engineer focused on Physical Design, VLSI implementation, and the advancement of next generation silicon architecture.
United States
San Francisco Bay Area
Information Technology & Services
Splunk Enterprise, Machine Learning, Synopsys Primetime, Grinding, Static Timing Analysis, Semiconductor Fabrication, Project Management, SRAM, Cadence Virtuoso, CMOS, MOSFET, SPICE, Synopsys tools, SystemVerilog, Physical Design, Logic Synthesis, Cadence Innovus, Embedded Systems, KiCAD, Python (Programming Language)
Experience
SoC Physical Design Engineer
Apple
San Francisco Bay Area
Cool stuff
Physical Design Lead
SiliconJackets
Atlanta, Georgia, United States
Managed and Led a team of 20 members to developed a Cadence physical design flow and successfully taped out a RISC-V core in the SkyWater 130nm process
SoC Physical Design Engineer Intern
Apple
Cupertino, California, United States
- Built cross platform GUI application enabling frequency uplift analysis, design bottleneck identification, and debugging across multiple EDA environments - Created automated post design thermal analysis workflows with single click execution, streamlining manual workflows
Electronic Hardware Engineer Intern
Stryten Energy
Alpharetta, Georgia, United States
- Designed and implemented a battery test bench simulation using custom PCBs, microcontrollers, and DAQ systems. - Utilized Python, C#, and C to create software solutions for monitoring and analyzing battery health. - Developed a user command and control GUI using Python and Modbus protocol for the deployment and management of Battery Energy Storage Systems at the Georgia Tech Research Institute. - Assisted in adding new testing functionality for firmware updates based on engineering requirements and contributed to the Hardware-in-the-Loop (HIL) testing program.
Undergraduate Research Assistant
Georgia Tech Research
Atlanta, Georgia, United States
Research advised by Dr.Randall Guensler.
Configurable Computing & Embedded Systems - Hardware
Georgia Tech VIP Program
Atlanta, GA
Design and development of test benches in Verilog for verifying the functionality of peripherals for external communication, along with supporting firmware functions on Microcontroller hardware. This includes programming, debugging, and verification processes.
Co-op Computer Engineer
Yokogawa
Newnan, Georgia, United States
3 semester work term rotations - Designing automated equipment validation systems, including developing both hardware and software solutions. - Providing engineering support to enhance efficiency in manufacturing lines.
Education
Georgia Institute of Technology
Electrical and Computer Engineering
VLSI & Nanotechnology
Georgia Institute of Technology
Computer Engineering
Collins Hill High School
Shibao Su's Contact Information
Phone
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