Shi Kang Chin

As a Technical Lead specializing in ATE Hardware development and Test Program architecture, I oversee the comprehensive Test Program Infrastructure, including scheduling and debugging processes. My role as the Product Test Program Lead involves steering weekly strategy meetings to synchronize test program modifications, development roadmaps, and address related concerns. My expertise extends to intricate debugging, particularly in TP infrastructure/module setup, parametric testing, and EOS/ESD analysis. In the realm of Test development, I am well-versed in Class/Sort test methodologies and the development process. My responsibility is to furnish robust solutions (both Hardware and Software) for Silicon/package level debugging activities and high-volume manufacturing (HVM) testing. My proficiency with the Advantest CMT and inhouse tester platform encompasses test configuration setup and understanding Tester Hardware specifications, among others. I am an adept Probe card (SIU) and Loadboard (TIU) Design owner, engaging from the initial stages of product development through design assessment and requirements gathering to final product specifications, I hold ownership of Load Board PCB (Test Interface Unit) design and collaborate with cross-functional teams, including design, component debug, Package design, to deliver high-quality Target-spec for Load Board and Probe Card design. I am accountable for Hardware checkout and validation, providing support and solutions for workarounds, and engineering solution for debugging purposes. My experience includes working closely with customers and suppliers to offer optimal testing solutions, particularly for new interfaces. I am proficient with the PCB design tool Cadence Allegro and possess a thorough understanding of PCB design rules and requirements. I hold the final approval for PCB designs prior to the commencement of board fabrication. IPC-certified PCB designer.