Sebastien Deldon

Senior Software Engineer

About

Moore's law has ended, reaching next level for performance can't rely anymore only on manufacturing process improvements. Now combination of novel hardware architectures, programming models and highly parallelized algorithms is driving changes in computing. My goal as a senior engineer is to participate to development of compilers, tools, applications, specification of hardware solutions that make parallel programming on GPU as easy as serial programming on CPU.

Country

France

City

Grenoble

Industry

Semiconductors

Skill

Debugging, SoC, Static Timing Analysis, Java, LLVM, CUDA, OpenCL, C, C++, GPGPU, X86_64, ARM, DSP, Profiler, Compiler Construction, Assembler, Android, Linux, Software Development, Digital Signal Processors

Experience

Senior Software Engineer

Nvidia

2013-7 - Present · 13 yrs 3 mos

Compiler & Tools Staff Engineer

PGI (STMicroelectronics)

2004-5 - 2013-7 · 9 yrs 3 mos

Grenoble Area, France

Development, optimization and productization of PGCL an OpenCL-C language compiler/runtime for Android targeting Dual ARM Cortex-A9 in ST-Ericsson U8500, developed bridge between PGI internal representation and LLVM assembly language. Application performance analysis and tuning for x86-64, ARM, MIPS, ST1xx DSP. Customer support, PGI training/promotion for European partners CCSI, HP AMD, BULL, IBM,ESI-Group on PGI x86-64/NVIDIA Business. Fully revamped profiler/debugger tools GUI, adapted runtime to support profiling for multi-threaded applications using HW counters and GPU profiling. C Compiler back-end development for ST1xx DSP, C++ Compiler optimization implementation for x86-64.

DSP application Engineer

STMicroelectronics

2002-9 - 2004-4 · 1 yr 8 mos

Grenoble Area, France

Application development for ST1xx DSP, responsible for GSM digital baseband demodulation component porting and optimization on ST122. Project leader on MP3 application porting and optimization for ST122.

Software Engineer

PGI (STMicroelectronics)

2001-5 - 2002-9 · 1 yr 5 mos

Portland, Oregon Area

In charge of performance analysis of STCC compiler after PGI acquisition by STMicroelectronics. Specification and implementation of a retargetable assembly tool infrastructure named STRASS that allows fast prototyping and productization of assembly tool for new processors.

DSP Architect

STMicroelectronics

1998-6 - 2001-4 · 2 yrs 11 mos

Grenoble Area, France

Performance evaluation and analysis of ST100 MCU/DSP. Development in ST100 assembly language of BDTi benchmarks, Optimization of EFR vocoder critical routines at C and Assembly level. Participation to specification of DSP architecture evolutions.