Sai Praneeth

• Designed end-to-end RTL for Prefetch Cache and Prefetch Engine, achieving 7.63 % IPC improvement on average across SPECint2006 benchmarks by reducing cache misses and hiding memory latency • Contributed to and debugged L2 cache RTL components including front-end arbitration, bank scheduling and pipelines, coherency, ECC, and CSR logic, resolving functional issues in collaboration with the verification team • Resolved 120+ functional and integration bugs across L2 cache, prefetch cache, and Load-Store unit (LSU) using simulation and Jasper formal verification • Designed and implemented cache replacement policies (Masked PLRU, Re-reference Interval Prediction (RRIP)) from specification through RTL, supported formal verification, and timing closure at 2GHz frequency

• Proposed a novel compact Reorder buffer resulting in approximately ~40% reduction in on-chip area and power • Integrating the new ROB design in Gem5 simulator for performance evaluation and McPAT for power and area • Filed Patent: Multi-Layer ReOrder Buffer, (PCT/US2024/017125, Pending)

Conducted research in the field of microarchitectural security under the guidance of Dr. Samira Mirbagher. • Conducted security analysis for a few microarchitectural optimizations and identified exploitable gadgets • Formulated proof of concept gadget with MLP aware fetch policy to leak victim’s secret in a sandbox model • Gadget inspection in kernel modules, shared libraries and network drivers using Ghidra

• Developed Ansys simulations to predict mechanical and optical performance for optical fiber cables • Optimized ribbon bond pattern and cable design for new high-density fiber cable through simulations

Cooperative adaptive cruise control (CACC) Mentor: Prof. Hugues Mounier Laboratoire Des Signaux ET Systems CentraleSupelec, Paris To simulate a CACC for a platoon of vehicles using differential flatness based technique. Cooperative adaptive cruise control (CACC) systems aim at increasing traffic throughput by allowing a smaller headway between vehicles thanks to vehicle to vehicle communications. The formed platoons thus permit vehicles to move safely at a smoothed speed. The CACC system can be viewed as an improvement over the classical ACC through the addition of feed forward signal in the control loop.

Designing self-organized nematic 3D quasi crystals Advisor: Prof. Jayasri.D • Performed simulations for a 3D self-assembly of faceted colloidal particles in nematic liquid crystals • Studied stability analysis for particle assembly using free energy minimization based on finite difference method • Conference Presentation: S. Madduri, A. Bregar, M. Ravinik, J. Dontabhakuni. Self-Organized 3D quasicrystals in nematic liquid crystals. 27thILCC2018,

Coursework: Spring 2022: ECE 563 - Microprocessor Architecture ECE 592 - Secure Processor Design ECE 573 - Internet Protocol Fall 2022: ECE 564 - ASIC and FPGA Design ECE 506 - Parallel Computer Architecture ECE 565 - Operating System Design ECE 792 - Advanced Microarchitecture Performance and Security Spring 2023: ECE 721 - Advanced Microarchitecture ECE 561 - Embedded Systems Optimization