Runlai Wan
Sr. Staff Engineer @ Qualcomm
United States
Orlando
Electrical & Electronic Manufacturing
Simulations, Matlab, Semiconductors, Nanotechnology, Design of Experiments, Electrical Engineering, C, Signal Processing, Characterization, Physics, C++, R&D, Electronics, Engineering, Thin Films, Materials Science, C++ Language, SPICE, Verilog-A
Experience

MTS GPU Shader Subsystem Architect
Orlando, Florida, United States
- Developed GPU high-performance GEMM for machine learning. - Developed GPU high-performance compute for Ray tracing. - Developed GPU SIMD architecture/micro-architecture for general-purpose computation.

Senior ASIC/ Layout Design Engineer
Orlando, Florida Area
- Machine learning accelerator design/performance verification - GPU virtualization hardware design verification - Ray tracing hardware design/performance verification - Experienced in design/performance verification on FPGA hardware emulator - Experienced in compute shader development - GPU design verification flow development

Research Assistantship
➢ Development of compact model for black phosphorus transistor based on MIT Virtual Source model • Developed compact model for black phosphorus (BP) transistor ranging from ballistic transport to diffusive transport, taking into consideration of BP thickness and crystal direction • Used Perl and OCEAN script to run massive device and circuit simulation with Verilog-a model ➢ Simulation of mono and few layer black phosphorus ballistic transistor base on Non-equilibrium Green Function Formalism • Wrote C++ codes to performed device simulation of Schottky barrier FETs • Constructed low energy k.p Hamiltonian of black phosphorus for the simulation • Investigated the effect of highly anisotropic band structure of phosphorene on its electrical characteristics

Device Modeling Engineer
Shanghai City, China
➢ Well understanding of device characteristics, fabrication, BSIM model, and Circuit Simulation. • Participated in a BiCMOS modeling project: evaluated devices electrical characteristics, extracted BSIM model parameters, and simulated devices with spice. • Participated in RF circuit design project: designed CMOS SPDT transmit/receive switch circuit, drawn layout and performed layout verification. • Device mismatch modeling, clean room experience, and familiar with integrated circuit fabrication process flow. • Skilled in measurement equipment (e.g. Agilent B1500 & HP4156).

Research Intern
Institute of Optoelectronic Material and Devices
Fudan University
➢ Well understanding of fabrication and characterization of transparent conducting oxide (TCO) films. • Investigated the growth of highly transparent and conducting indium zinc oxide (IZO) thin films by pulsed plasma deposition (PPD), with a focus on determining the influence of composition and process parameters upon the structural, electrical and optical properties of the TCO films. • Experienced in the operation of characterization instruments like profilometer, Hall Effect measurement, spectrophotometer; good at analyzing the XRD pattern.
Runlai Wan's Contact Information
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