Remon Merza
Senior System Engineer
About
30+ years of engineering experience in Systems, Software and Testing. Expertise in full software lifecycle development, encompassing high and low level requirements design, software development, system (Software/Hardware) integration testing, and independent Verification and Validation testing and requirements ‘arbitration’ in the development environment, of embedded and non-embedded software. Expertise in management of software testing teams for man-rated systems and DOD communications.
United States
Greater Phoenix Area
Defense & Space
DO-178B, RTOS, Embedded Software, Embedded Systems, Systems Engineering, Testing, Software Engineering, Perl, Avionics, Integration, Firmware, FPGA, Engineering Management, Software Development, Requirements Management, ClearCase, Real-Time Operating Systems (RTOS), C++
Experience

Senior System Engineer
Boeing Global Services
Oklahoma, United States

Senior System Engineer
Honeywell Aerospace
Clearwater, Florida, United States

Principal System Engineer
Honeywell Aerospace USA/via Belcan Engineering Group
United States

Software Systems Engineer
General Motors, via Harman Connected Services
Phoenix, Arizona Area

Systems/Software/Test Engineer
BELCAN Engineering Group
Tempe, Arizona Area
L3 Harris/ACSS, Principal Systems/Test Engineer Phoenix, AZ 3/2019 – 7/2019 Created and maintained Test Plans and Hardware Test Software (HTS) for the NXT (600, 700 and 800) Transponders. The HTS consisted of Test Stand (2016) sequences, statically/dynamically linked to (C function) libraries. The HTS covered the End Item Tests and Environmental Stress Screening. Also, Created Operational Software Test Requirements for the NXT (600, 700 and 800) Transponders. Tools used: Rational ClearCase (Explorer 9.0.1.6), TestStand Engine Ver 2016 f2 (16.0.0.193) 64-bit, Sequence Editor Ver 16.0.0.195, LabWindow/CVI 2012 Ver 12.0.0 (422), Rational ClearQuest Ver 9.0.1.06. GE Engines, Principal Systems Engineer (Remote) Cincinnati, OH 10/2018 – 3/2019 Generated memory requirement estimates for the US Army’s XT901engine. Memory estimates required accommodation for the DEOS® operating system and the Electronic Engine Control and Distributed Control Module software. Also, finalized, adding the final touches to the XT901 engine requirement specifications, before presenting to customer. Honeywell Aerospace, Principal Systems/Test Engineer Phoenix, AZ 07/2018 – 10/2018 Worked on Cyber Security Proposal that will test/report/assess the cyber risk of various Honeywell’s avionic components. Created the following cyber security templates: Security Test Plan Template, Security Test Report Template, and Risk Assessment Report Template, in anticipation of future work on cyber security. Honeywell Aerospace, via Belcan Engineering Group (Contractor) Principal Systems Engineer (Remote) Tempe, AZ 11/2016 – 6/2017 Developed and maintained DO-178B/C compliant SRS, SRD and the SDRLs (SUPPLIER DATA REQUIREMENTS LIST) documents for military aircraft Environmental Control Systems (ECS).

principal Systems Engineer
Honeywell Aerospace, via Belcan Engineering Group
Tempe, Arizona
Developed and maintained DO-178B/C compliant SRS, SRD and the SDRLs (SUPPLIER DATA REQUIREMENTS LIST) documents for military aircraft Environmental Control Systems (ECS).

Principal Systems/Software Engineer
Honeywell Aerospace via Enea Software
Phoenix, Arizona Area
Performed DO-178B compliant analysis, development and maintenance of Honeywell Primus Epic Touch Screen Controller (TSC) display embedded software (using C/C++ in DEOS envir) and AppSpec/SRD system’s documents, as a part of Gulfstream GVII (GV500) Business Jet project. Performed software updates and maintenance on most of MAU functionalities (FMS, CMF, TGF, CAL, TFM, TDL, TOLD, etc.) Migrated SRD and DDD documents from PVCS to DOORS, establishing full forward and backward traceability of the requirements. Tools Used: Serena Dimensions CM (10.1.3), ASPIRE (Honeywell-AeroSpace Peer Inspection and Review Environment), JIRA (Atlassian-Issue Tracking) and EASE (Honeywell- EPIC Application Simulation Environment), to name a few.

Principal Test Engineer (Secret Clearance)
U.S. Navy, via Datasoft Corporation
Tempe, AZ
Performed software testing of the Navy’s Advanced TIP (ATIP) system, which is the Advanced Time Division Multiple Access (TDMA) Interface Processor. The ATIP is installed on ships and submarines, as well as, on several shore gateway facilities, such as Naval Computer and Telecommunications Area Master Station (NCTAMS) sites, Submarine Broadcast Command Authority (BAA) sites, and U.S. Department of Defense Teleport sites. The ATIP provides transparent bridging among Internet Protocol (IP) users located throughout the world and connected via Milstar medium-data-rate (MDR), Advanced Extremely High Frequency MDR/Extended Data Rate (XDR), or Enhanced Polar XDR SATCOM links. The ATIP sends and receives data at faster rates than the TIP system it replaces. Responsibilities included design and execution of test cases that encompassed the communication between the different components of the system and the functionality of the user interface.

Principal Systems/Software Engineer
Honeywell Aerospace via Real Time Companies
Phoenix, Arizona Area
Updated the DO-178B compliant Systems Requirements (SSRD) and Embedded Software (using C/C++ in DEOS envir), of the Non-Resident Boot portion of the Input/Output Gateway Module (IOGM), for the PV-10 project. Analyzed the Core Built-In Test (CBIT) component’s SSRD, DDD and the software, identifying all the necessary modifications for efficient execution within the PV-10’s IOGM module.
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