Rashika Singhal
CPU Design Verification Engineer @ Google
About
I’m a Verification Engineer at Google with a Master’s in Computer Engineering from USC specializing in digital design, CPU architecture, and UVM-based verification.Passionate about CPU architecture and hardware verification, I thrive on solving complex design challenges and ensuring silicon quality from spec to signoff. Let’s connect if you’re working on cutting-edge processor or memory subsystem verification.
United States
Portland
Computer Hardware
CDC, SystemVerilog, Test Planning, Microarchitecture, Algorithms, Innovus, Vlsi, Hardware Description Language, Hardware, Research, Programming, Verilog, Universal Verification Methodology (UVM), Static Timing Analysis
Experience
CPU Design Verification Engineer
Portland, Oregon, United States
Verification Engineer
Arm
CPU Engineer
Arm
Chandler, Arizona, United States
Senior System Engineer
BrahMos Aerospace
Nagpur, Maharashtra
Worked with engineers and developers to coordinate design solutions for the system components. Prepared Quality Assurance plans to ensure end-to-end quality of deliverable missile system.
System Engineer
BrahMos Aerospace
Hyderabad, Telangana, India
Executive Trainee
BrahMos Aerospace
Delhi, Delhi, India
Volunteer
UPAY (UnderPrivileged Advancement by Youth)
Nagpur, Maharashtra, India
Summer Intern
University of South Brittany
Lorient, Brittany, France
Pursued Research Internship on Computer Vision and Video Processing. Modeled a robot by extracting the facial keypoints and emotions using OpenIMAJ and OpenCV library. Further used these extracted keypoints for programming of the robot using the SSC-32 servo motor card. The robot would capture human emotions (smile, surprise, disgust, laugh) and imitates the same.
Education
University of Southern California Viterbi School of Engineering
Computer Engineering
Malaviya National Institute of Technology Jaipur
Electronics and Communications Engineering
Rashika Singhal's Contact Information
Phone
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