Rajarshi Das
Silicon Engineer @ Meta
About
I am an MS in Computer Engineering student at Texas A&M University, College Station, USA. I am doing research on HPC architectures with Dr. Paul V Gratz. Before this, I worked on shared last-level cache fairness. My interest primarily lies in CPU and GPU Cache/ Memory subsystem architecture, performance analysis, and modeling. I have around five years of experience working with cutting-edge semiconductor products across different market segments and have significantly contributed to 4+ successful product tape-outs.
United States
Santa Clara
Semiconductors
GPU architecture, Memory Controllers, Performance Modeling, Performance Analysis, C++, Workload Characterization, C (Programming Language), OpenGL Shading Language (GLSL), Microarchitecture, Operating Systems, C, CPU design, High Performance Computing (HPC), Architecture, Flash Memory, Formal Verification, FPGA prototyping, Computer Architecture, Digital Designs, Clock Domain Crossing
Experience
Silicon Engineer
Meta
Sunnyvale, CA
Part of Meta Training and Inference Accelerator (MTIA) group working on performance architecture and modeling.
Member of Technical Staff
Rivos Inc.
Santa Clara, CA
Memory Subsystem Performance architecture and modeling
GPU Architecture Intern
Arm
Austin, Texas, United States
Studied and evaluated new hashes for the GPU memory subsystem for future Arm GPU products. Conducted performance analysis and scalability studies with graphics and compute workloads.
Design Verification Engineer
Texas Instruments
Bengaluru, Karnataka, India
Worked both as an SoC and IP Design Verification Engineer. I worked on embedded processors targeted for automotive and industrial segments, handling responsibilities across the stack: from verification planning for RTL and GLS to resolving customer queries.
Senior Hardware Engineer
Samsung Electronics
Bengaluru, Karnataka, India
IP Design Verification Engineer for Samsung's NVMe memory controller team.
Education
Texas A&M University
Computer Engineering
ECEN 427: Machine Learning ECEN 676: Advanced Computer Architecture ECEN 689: (Special Topic) Processor Memory Systems CSCE 611: Operating Systems CSCE 735: Parallel Computing ECEN 714: Digital Integrated Circuit Design ECEN 749: Microprocessor Systems Design ECEN 687: Introduction to VLSI Design Automation ECEN 651: Microprogrammed Control of Digital Systems
Jadavpur University
Electronics and Communications Engineering
Rajarshi Das's Contact Information
Phone
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