Raghu Charan Muktevi

I work on digital design and verification with a focus on building and validating reliable hardware systems.Right now, I’m a Research Assistant at San José State University, where I’m working on RTL design and verification for silicon prototyping. Most of my work involves writing SystemVerilog-based testbenches, debugging simulation issues, and making sure designs behave correctly across edge cases. I’ve also worked at Young Gates and Accenture, where I was involved in digital design and hardware-focused development. That experience helped me get comfortable with timing issues, debugging, and understanding how designs behave beyond just the “happy path.” Some of the work I’ve done includes verifying an OFDM FFT block, building and testing a pipelined MIPS processor, and working on high-throughput computation logic. I enjoy digging into failures, figuring out why something broke, and fixing it properly. I’m currently looking for roles in design verification or RTL where I can work on complex digital systems and keep getting better at debugging and building solid verification environments.