praveen narra

Design and Implementation of an Accurate speed and position measurement

* 1. Design and implementation of the chip level tests and verification of the compute block. * 2. Study, design development, verification and validation of Memory BIST for VMC1 chip (kernel based) . * 3. Worked on the interface for ATE environment . * 4. Study, design development, verification and validation of Memory BIST for VMC-T chip in assembly code . * 5. Power Measurements and analysis for the released chip * 6. Worked on the verification of the processor includes chip&block level testcases development and testbench environment enhancement. * 7. Worked on Chip bring up activities for the tape out chip * 8. Started working for next generation chip * 9. Worked on the bringup activities of I2S and DM. * 10. Working on the verification activities of the primary blocks like audio includes DM and I2s, and multi thread processor.

Linting tool rules and rule-set finalization in HDL Designer, Leda and their automation using perl and TCL for all the teams in Xilinx.