PRANITHA CH
dft engineer
About
*Completed DFT course at Chipedge Technologies which is of duration 6 months. *Good knowledge on Digital Electronics and VLSI ASIC flow. * Basic knowledge on CMOS. * DFT Scan Insertion & Stitching using DFT compiler. *DFTmax on Compression/Bypass Modes. *ATPG using Tetramax. * Stuck-at & Transition faults block level ATPG. *Basic understanding of JTAG * simulation
India
Bengaluru
Semiconductors
ATPG, Joint Test Action Group (JTAG), SIMULATION, Scan Insertion, Compression, Automatic Test Pattern Generation (ATPG), Boundary Scan, DFT Compiler, DFT , VHDL, Verilog, Microsoft Word, Digital Electronics, veri log, Java, Microsoft Office, Microsoft Excel, Matlab, C (Programming Language)
Experience
dft engineer
DFT
PRANITHA CH's Contact Information
Phone
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