Piyush Dodiya

Orchestrating innovation at the intersection of design verification strategy and engineering leadership, Piyush brings 13+ years of experience in IP, Subsystem, and SoC design verification. Piyush led globally distributed teams, architected scalable DV infrastructures, and delivered quality sign-offs on complex Design Verification targets. A tech-savvy problem solver fueled by curiosity, Piyush thrives on cracking hard challenges and driving innovation with bold, future-shaping solutions. Piyush's expertise spans performance benchmarking of NVMe-based eSSD Controllers, emulation and verification of ARM CMN Interconnects based chiplets, and development of reusable UVM + Embedded C testbenches. Piyush has built simulation and regression environments from scratch, supported tape-outs, post-silicon bring-up, and accelerated project velocity with precision. Empowering teams through clarity and mentorship, Piyush collaborates seamlessly across Design, Architecture, Firmware, Systems, and Validation teams to deliver cutting-edge technology solutions for AI accelerators and heterogeneous SoC platforms. * Core Competence: ✅ Design verification and emulation strategy for complex IP, Subsystem, and SoC architectures ✅ Advanced DV methodology development using UVM RAL and EDA tool features (e.g., save & restart) to reduce verification effort and cycle time for multi chiplet system ✅ Scalable testbench architecture (UVM + Embedded C) and regression environment development ✅ Performance benchmarking for NVMe enterprise SSD Controllers and DV sign-off acceleration for ARM CMN Interconnects. ✅ Sub-system verification of NVMe/USB 3.1-based external SSD Controller Host Interface ✅ Industry-standard EDA tools expertise encompassing usage, deployment, and R&D-driven optimization ✅ Verification framework modernization through third-party VIP integration and legacy infrastructure reverse engineering