Pierre Mecca

Pierre Mecca

Field Application Engineer @ Hailo

About

Electronic Engineer with experience in edge AI semiconductors, embedded systems, and customer-facing engineering roles. Currently a Field Application Engineer at Hailo, providing pre / post-sales support to customers across EMEA on software integration, neural network optimization, and application deployment on Hailo AI accelerators and vision processors. Strong R&D background in embedded AI for automotive perception systems, deploying models on embedded SoCs from different vendors. Additional experience in digital design and verification for mixed-signal integrated circuits.

Country

Germany

City

Munich

Industry

Computer Hardware

Skill

Universal Verification Methodology (UVM), Artificial Intelligence (AI), SystemVerilog, VHDL, Sensori, C++, Architettura hardware, Matlab, Synopsys , EDA Tools, Innovus, Digital Circuits, Reti neurali, Machine learning, Embedded Systems, Python

Experience

Hailo

Field Application Engineer

Hailo

LinkedIn
2023-3 - Present · 3 yrs 7 mos

Monaco di Baviera

• Managing and supporting EMEA-based customers in the adoption and implementation of edge AI solutions built on Hailo products. • Providing in-depth technical expertise and pre/post-sales support, including system design, debugging, and performance optimization. • Leading Hailo's software enablement efforts for the ASTRIAL platform, a joint solution developed by EBV Elektronik and System Electronics, including application • Conducting technical presentations and workshops to demonstrate the capabilities and benefits of Hailo products to customers. • Took ownership of strategic software enablement initiatives beyond the tradition FAE scope, including the porting and optimization of the Whisper speech recognition models for Hailo devices.

Analog Devices

Senior Engineer - Mixed Signal Design

Analog Devices

LinkedIn
2022-5 - 2023-3 · 11 mos

Dublino, Irlanda

Responsible of Digital Mixed Signal Verification for Automotive BU products • Development and automation of UVM-based environments for DMS simulations • Definition of verification plans and analysis of Functional Coverage and Code Coverage • Planned and managed project software releases.

Analog Devices

Digital IC Design Engineer

Analog Devices

LinkedIn
2021-8 - 2022-5 · 10 mos

Dublino, Irlanda

• Design and verification of digital modules for mixed-signal integrated circuits. • Implemented Python-based methodologies for verification.

Marelli

Embedded AI Specialist - Electronic Software Perception

Marelli

LinkedIn
2019-7 - 2021-8 · 2 yrs 2 mos

Venaria Reale, Piemonte, Italia

The activity consisted in the deployment of deep learning algorithms on embedded devices, working both at framework level (adapting the neural network model operators to a format accepted by vendor converters) and at execution level (using C/C++ APIs to run the model on the device). Tools: Tensorflow, ONNX, PyTorch, SNPE, QTCreator, Git Platforms: Qualcomm , Renesas , Texas Instruments, Others Languages: C/C++, Python

Marelli

Embedded AI Intern

Marelli

LinkedIn
2019-1 - 2019-7 · 7 mos

Venaria Reale, Italia

The internship was mainly focused on the deployment of deep neural networks on embedded platforms for autonomous driving, from neural networks surgery at framework level (TensorFlow) to the optimized execution on the target hardware. Secondary activities included the development of firmware for automotive camera sensor driver and the management of video streams Tools: TensorFlow, SNPE, Android SDK Programming Languages: C++, Python

Marelli

Master's Thesis Candidate - Business Development for Autonomous Driving

Marelli

LinkedIn
2018-3 - 2018-12 · 10 mos

Venaria Reale, Italia

Thesis subject: "Advanced Hardware Solutions for Neural Networks Inference in Autonomous Vehicles" The activity was focused on the evaluation of embedded platforms for neural networks inference, as well as on optimization techniques to deploy AI models on hardware platforms with limited parallelism like FPGAs. The project covered a large spectrum of topics, from neural networks definition and optimization using Caffe framework to implementation of basic operators on FPGA using Xilinx Vivado. Programming Languages: C++, Python, VHDL

Istituto Superiore Mario Boella

Bachelor's Degree Intern - Applied Photonics

Istituto Superiore Mario Boella

2016-4 - 2016-9 · 6 mos

Torino, Italia

Characterization of an NG-PON2 optical receiver

Education

Politecnico di Torino

Politecnico di Torino

LinkedIn

Electronic Systems

2016 - 2018 · 2 yrs
Politecnico di Torino

Politecnico di Torino

LinkedIn
2013 - 2016 · 3 yrs

Pierre Mecca's Contact Information

Email

******@***.com

Phone

(**) *** ****

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