Pavan Vishnu
Senior DFT Engineer I @ ACL Digital
About
Experienced DFT Engineer with hands-on expertise in concepts of digital electronics, Verilog, and DFT methodologies. Skilled in ATPG, MBIST insertion, and coverage analysis using Tessent, DVE, and Verdi tools. Proficient in TCL and shell scripting for automation and validation. Proven ability to improve project efficiency and deliver high-quality results for clients like Intel.
India
Bengaluru
Computer Software
IJTAG, Joint Test Action Group (JTAG), Boundary Scan, Automatic Test Pattern Generation (ATPG), Gate Level Simulation, Shell Scripting, Unix, MBIST, Cadence Virtuoso, SystemVerilog, HTML, Cascading Style Sheets (CSS), React.js, JavaScript, Python (Programming Language), Xilinx Vivado
Experience
Senior DFT Engineer I
ACL Digital
Bengaluru, Karnataka, India
DFT Engineer L2
Wipro
Bengaluru, Karnataka, India
Engineering Intern
Publicis Sapient
Bengaluru, Karnataka, India
Education
PES University
Electrical, Electronics and Communications Engineering
Pavan Vishnu's Contact Information
Phone
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