Ovidiu Plugariu
Digital Verification Engineer Contractor @ Cirrus Logic
About
I am interested in Digital Design and Functional Verification for FPGA and ASIC. I have experience with FPGA/ASIC design and verification for aerospace/automotive, applied cryptography, digital signal processing, data compression, microcontroller architectures and embedded systems. I have a PhD in Electronics and Telecommunications. I did research related to hardware accelerators for heterogeneous distributed computing systems (FPGA+ARM) . I am a very good user of: SystemVerilog/Verilog, UVM, Python, C, Modelsim/Questasim, Cadence/SimVision, assembler.
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Romania
Semiconductors
SystemVerilog Assertions, ASIC Verification, Universal Verification Methodology (UVM), Functional Verification, Embedded Systems, Verilog, FPGA design, Microblaze system, Applied cryptography, C and assembler for embedded systems, Xillybus for PCIe, Matlab/Simulink, Cryptography, Linux, C, Integrated Circuit Design, FPGA, C++, Xilinx, Microprocessors
Experience
Digital Verification Engineer Contractor
Cirrus Logic
United Kingdom
Digital Design Verification using SystemVerilog/UVM (block level).
Functional Verification Engineer
NeuroBlade
Functional Verification using SystemVerilog/UVM for FPGA hardware accelerators used in SQL processing.
Senior Design Verification Engineer
CHIPAHEAD
Functional Verification using SystemVerilog, UVM, and C++ for digital IPs.
ASIC and FPGA Verification Engineer
TTTECH
Bucharest, Romania
Verification using VHDL/SystemVerilog/UVM/Python/C for aerospace/automotive, safety-critical ASICs/Ethernet Switches.
Digital Design Engineer
Microchip Technology Inc.
Bucharest, Romania
Digital design and verification using Verilog/SystemVerilog/Assembler for 8bit PIC microcontrollers, design optimizations for low area and power efficiency.
Telecommunications engineer
The Special Telecommunication Service
Bucharest, Romania
I did research and implementation for crypto algorithms in FPGA. Familiar with IPSec protocol and digital certificates usage.
Education
University POLITEHNICA of Bucharest
Electrical, Electronics and Communications Engineering
The domain of the PhD thesys is "Hardware Offloading for Energy-Efficient Distributed Computing". This is a complex study on practical methods used for offloading several software performed operations in Hadoop clusters, to FPGA hardware accelerators (crypto, hash, zip). The purpose is to reduce the processing time and the energy consumption in the network nodes of a Hadoop heterogeneous cluster (using Zynq chips).
University POLITEHNICA of Bucharest
Advanced Microelectronics
Design of digital embedded systems. Applied cryptography. Digital Signal Processing. Microprocessor Design. Dissertation: "Implementation of a VPN concentrator" - AES in FPGA + PCIe + StrongSwan VPN + Linux + IXIA traffic generator + C
Ovidiu Plugariu's Contact Information
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