Nikhita Neelakanta
Engineer @ Arm
About
Interested to work in CPU/GPU RTL design roles, architecture roles, with strong background and focus on memory subsystems. Architected and Designed the MMU walker in system verilog for the latest A profile ARM Architecture CPUs Actively seeking Summer Internship 2026
United States
San Diego
Semiconductors
Synopsys VCS, RTL Coding, Memory Subsystem, ML Accelerator Design, RTL Design, Architecture Modeling, CPU Architecture , ARM Architecture, C++, Python (Programming Language), Simulation, Engineering Research, SystemVerilog, Functional Verification, Compiler Toolchain, SoC architecture, Operating Systems, Computer Architecture, System on a Chip (SoC), ARM Assembly
Experience

Compiler Intern
Bengaluru, Karnataka, India
Project title: Enhancing the multicore bootflow for Sitara MCU line of devices - Proposed a framework using Compiler and Linker provided tools, which recorded a significant 10x improvement in Boot times and CPU load times. - Demonstrated the work using the GNU GCC toolchain and then ported it to the TI developed compiler toolchain. Worked with the compiler team to fix the gaps identified in the process. Received a Pre Placement Offer (PPO) for exemplary performance during the internship
Education

Electrical and Computer Engineering - Computer Engineering Specialisation
Coursework: CS240A : Principles of Computer Architecture CS240B : Parallel Computer Architecture EC213 : Parallel Computing EC284 : Topics in Computer Engineering - VLSI Implementation for ML(RTL design) EC260A : VLSI Digital Algorithms and Architectures. EC260B : VLSI Integrated Circuitry
Nikhita Neelakanta's Contact Information
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