Nick Tao

• Extensive hands-on experience in III-V device design, processing and characterization • Expert knowledge of compound semiconductor materials and devices • Advanced knowledge of RF applications with III-V technology • Track record of leading cross-functional team for GaAs technology R&D and production • High value placed on teamwork, self-motivation, and leadership (1) Development of GaAs based transistors for wireless applications (PAs, switches, etc.) • Led next gen HBT development involving cross functional teams such as test and modeling, circuit design and reliability. • Worked closely with wafer suppliers to design and optimize epi-layers for heterojunction bipolar transistors (HBTs) and high electron mobility transistors (HEMTs). • Designed test layouts (ADS), defined the metrology, and hands-on testing • Performed TCAD (Atlas and Sentaurus) simulations to optimize epi layers, help address yield and reliability issues in manufacturing. • Designed and optimized HBT unit cells by performing 3D thermal simulations (CoventorWare and ADS ETH) and electrical characterizations. (2) Research and development in InP based and other III-V transistors • Designed and fabricated high frequency (up to 300GHz) InP based DHBTs, metamorphic InAlAs/InGaAs HEMTs and InP/GaAsSb HBTs, and InGaSb transistors and Hall sensors. • Characterized on-wafer devices in terms of temperature dependency and minority mobility. (3) Device epi-layer growth and processing • Grew device epi-layers with MOCVD tool. • Fabricated devices with advanced techniques such as photolithography, wet and dry etching, and thin film deposition, in the CMOS compatible cleanrooms of class 100. (4) Specialties: Compound semiconductor device design, processing, characterization, modeling and simulation (5) More than 25 granted US patents and 50 US patent applications, and more than 20 journal and conference papers (6) Journal paper reviewer: APL, IEEE EDL