Neil Shah

CPU RTL design Engineer @ Apple

About

Graduate with honors from University of Southern California, with a demonstrated history of working on IC design projects professionally at work, internships and academically at school. Skills: RTL Design and DFT. Languages: Verilog, SystemVerilog, Perl, Python, C. Tools: Synopsys VCS, DC, TetraMAX, Verdi, Primetime. Cadence NC-Sim, Innovus. Xilinx Vivado, ISE.

Country

United States

City

San Francisco Bay Area

Industry

Computer Hardware

Skill

Cadence Virtuoso, Cadence Spectre, Digital IC Design, Digital Circuit Design, Field-Programmable Gate Arrays (FPGA), Computer Architecture, Verilog, VHDL, C++, Matlab, Xilinx ISE, Guitar Playing, Microsoft Office, RTL Design, Logic Synthesis, C, Python

Experience

CPU RTL design Engineer

Apple

2022-2 - Present · 4 yrs 8 mos

Cupertino, California

CPU Design for Test (DFT) Engineer

Apple

2018-2 - 2022-3 · 4 yrs 2 mos

Cupertino, California

CPU - Design for Test (DFT) Intern

Apple

2017-8 - 2017-12 · 5 mos

Cupertino, California

ASIC Engineering Intern

Palo Alto Networks

2017-5 - 2017-8 · 4 mos

Santa Clara, Califonia

• Actively involved in RTL Design of Content-Sequenced-Processor (CSP) Cluster for higher flexibility in packet processing without compromise on performance. • Design Verification (UVM) of Ternary CAM for Next-Gen Hardware Firewall products.

Mentor For EE101 (Introduction to Digital Design)

University of Southern California

2017-1 - 2017-6 · 6 mos

Greater Los Angeles Area

• Act as an Academic Mentor to assist Students in understanding study material and Labs • Grade, advise regarding examinations and submissions made by the students

Grader for EE457 (Computer System Organization)

University of Southern California

2016-8 - 2016-12 · 5 mos

Greater Los Angeles Area

•Evaluate and grade the Lab submissions made by over 150 students enrolled in 'EE457: Computer Systems Organization' at University of Southern California

Electronics Engineering Intern

Micro Science Services

2015-5 - 2015-12 · 8 mos

Mumbai

• Assisted in debugging and repair of damaged Medical equipment circuit boards. • Electronic circuits from O.T. tables, Coulometers, Dental X Ray, Dental Chairs.

Electronics Engineering Intern

Micro Science Services

2014-5 - 2014-8 · 4 mos

Mumbai, India

• Assisted in debugging and repair of damaged Medical equipment circuit boards. • Electronic circuits from O.T. tables, Coulometers, Dental X Ray, Dental Chairs.