Naohiro A.

System Solution Bisinsss Dept. Platformcore Development Dept.2 Sec.4 Sony Semiconductor Solutions A Vision Foundation Model development with Sony Research. Utililze GPU(H100/A100)/Storage computing environment for AI traing. Large sclae AI training/evaluation dataset development for the foundation model. Manage ~20 Annotation team. Manage and control outsourcing annotation to 3rd party vendors. Collaboration to develop efficient annotation environment with FastLabel corporation and the other annotation tool vendor. Work with legal team for AI ethics/GDPR compliant AI development scheme. Consideration and practice of utilizing employment for people with disabilities requested by top management. BizDev for cutting edge CIS applications for FA/surveillance/Machine Vision/Computer Vision/Biometrics/AI/Machine Learning. CIS I/F specification development for MIPI/SLVS-EC PoC development using FPGAs including CPU/GPU/Neural Net Acceralator

Storage Media Div Business development of storage solutions for LTO tape media for IP surveillance, drone, computer vision, enterprise servers Drove special tasks requested by top managements. Customer relation/channel development/collaboration with major US storage vendors/cloud vendors. Customer demand collection from datacenter customers. Collaboration with IBM reserch Zurich ro depelep LTO tape dimention stability/tension control argorythm. * Open Compute Project(OCP) Sony representive since 2018. Joined OCP storage WG requested by major US cloud vendor. One example: Edge storage solution for IP surveillance camera http://www.sony.net/ipcamsd/ This solution have been used several IP camera vendors Sony IP camera + a couple of major IP camera vendors in Security 50 ranking. Major video management system(VMS) also support the features. *Board of directors of Compactflash Association until 2016 Leading the discussion of next generation CFA memory card standard. CFexpress = PCIe IF + NVMe protocol + XQD form factor, which may unify current existing various form factors. CFExpress ver1.0 spec. has been released from the Compact Flash Association

Advanced Memory System R&D Office Reseearch & Development Division Semiconductor Business Group Focusing on new generation memory such as PCM, MRAM and ReRAM technology and its applications LPDDR2 IF design lead for Industry first 16Gbit ReRAM(CBRAM) co-developed with Micron Technology which had presented ISSCC2014.

Product Dept.1 System LSI Div. Device Solution Business Group R&D for low power processor design methodology System architecture exploration for any mobile device CPU/Bus fabric subsystem architecture developmen using ARM/MIPS for CPU and Sonics/ARM/Arteris for bus.

Storage Media Div. Memory System Technology Dept. ASIC design SxS/XQD professional sillicon strage media development Defined XQD spec. as Compactflash Association RR working group chairman since Dec. 2009.

A member of ARM CPU design team based on Cambridge, UK A member of ARM9EJS core(used in ARM926EJS) development. Technical lead of ARM9ES rev.2 core used in ARM966 and ARM968 Technical lead of PL200 memorystick host controller A member of ARM1136 dev. team

16bit/32bit CISC MCU development tool design On chip debug circuit for TX19 MIPS based microprocessor

A member of CPU design project(TMIPS project) The processor is designed as the Industry first VSIA compliant IP. Designed Debug Support Unit(DSU)