Namrata Swamy
TPU Design Verification Engineer @ Google
United States
San Jose
Computer Hardware
SystemVerilog, UVM, C, FPGA, VLSI, Verilog, VHDL, ModelSim, NC-Verilog, Chipscope Pro
Experience
TPU Design Verification Engineer
Design Verification Engineer for Machine Learning Accelerators
Design Verification Engineer
Altera
San Jose
Worked with the Fullchip pre-silicon design verification team responsible for verifying Altera SoC FPGA devices .
Design Verification Intern
Altera
Austin, Texas Area
Worked with the sub-system pre-silicon design verification team , verifying the Secure Device Manager in Intel SoC FPGA device.
Graduate Student
University of Southern California
Application Developer
IBM India Pvt. Ltd
Education
Visvesvaraya Technological University
Electronics and Communication
Namrata Swamy's Contact Information
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