Lee Rui En

As a member of the backend team, I am primarily responsible for the translation of verilog design syntax into the synthesis of FPGA hardware primitives. I am also tasked for the synthesis, simplification and verification of logic elements.

As an R&D engineer in a data analytics company, I am tasked in various projects that demand the development and deployment of artificial intelligence-based solutions.

I have had the pleasure of participating in the development of the user interface of AMR (Autonomous Mobile Robot).

As an apprentice, I got the first hand experience to assemble and disassemble a PC. I get to explore the interior hardware of a typical laptop and identify the individual components. On the other hand, I also learned to fix and install intermediate software into a PC.

Growing up fascinated by groundbreaking discoveries and inventions, I have longed to be a part of the field of engineering. My dream has always been to build a robot to aid in my everyday life. Studying Mechatronics Engineering at Monash University has given me invaluable insights, knowledge and experience to achieve this goal. While taking this course, I have learned everything essential about building electronics, programming and integrating them with mechanical systems. I am more than excited to put these skills to use in the future.