Nagesh Vishnumurthy
Director of Engineering @ Rambus
About
Accomplished semiconductor industry leader with over 26 years of experience specializing in SoC, GPU, Interconnect fabric and CPU verification, design, and delivery. Proven track record of setting up and managing large technical teams (up to 85+), driving flagship projects at Samsung, AMD, Broadcom, Intel, and IBM. Built Samsung’s GPU Verification & Emulation team from the ground up, delivering multiple generations of flagship Galaxy SoC GPUs. Renowned for cross-functional team leadership, technical execution, process improvements, and fostering a culture of innovation. MBA from IIM Bangalore and BE (NITK), recognized industry-wide for mentoring, technical vision, and driving teams to success.
India
Bengaluru
Computer Hardware
GPU, Graphics Processing Unit, AI, CXL, Coherent interconnect, ASIC, Processors, VLSI, Microprocessors, Computer Architecture, SoC, Verilog, Debugging, Semiconductors, SystemVerilog, Low-power Design, People Management, Digital Signal Processors, VHDL, Perl
Experience

Director of Engineering
Bangalore Urban, Karnataka, India
Set up and led Samsung’s GPU Design Verification and Emulation team from the ground up, delivering multiple flagship Galaxy SoC GPUs (M2, M3, M4, M5) on schedule and managing complex feature verification across several product generations. Contributions towards derivative products GPU. Grew the team from 0 to 60 member for Eclipse 920 GPU.

Senior Manager
Bengaluru Area, India
India Lead Infinity Fabric Verification - ((PIE(Power Management, Interrupt, ETC), CXL, CMP UVC, DF TB, RTG & Client Deployment), - RTL and PostSilicon teams. Participated in many LSDs and Tape-outs (Genesis, Badami, Renoir, Matisse, Cezanne, Rembrandt, Navi2x, Navi3x, Mi100, Mi200, Mi300…) Grew the team from 40 to 80 engineers. Previously Managing Server SoC Verification ( led CDP, DFD, CReST, Gatesim teams) and lead Milan (Starship B0) DV to Tapeout. Setup SCBU Verification/ATPG team and grew team from 0 to 40 engineers.

Sr. Manager, IC Design Engineering
Bangalore
Significant DV ownership of 64b, super scalar high-speed ARM processor (Fetch, Issue, Scheduler, Mapper, EX, floating point, SIMD, MMU, LS). Bus Interface unit ownership of ARM A53 subsystem which went into products like 4908, 6858, 7268, 7261. Grounds up development of Random Instruction generator and Instruction simulator

Sr. VLSI Design Engineer
Sr. Design Engineer with Broad Design and Verification experience in server and mobile Microprocessor Designs. Involved in verification of multiple billion transistor design chips. Contributed to Yonah, Intel's first Dual Core, Low Power, Mobile Micro-Processor, Merom Intel's Core Duo Microprocessor, Whitefield (4 core 65nm) enterprise server microprocessor and Dunnington - India's first 6-core (6 core 45nm) enterprise server microprocessor. Lead Instruction Architecture Verification team in 8 core Xeon Server (32nm) Microprocessor
Education
Nagesh Vishnumurthy's Contact Information
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