Kartik Saxena

Verified a gen 2 Security IP, leveraging UVM testbenches and firmware-driven verification methodologies. Developed C firmware using the RISC-V GNU toolchain to validate boot flows and CPU interactions. Created random stimulus generation and functional coverage models to improve test completeness. Validated multi-master, multi-slave access control over AXI, AHB, and APB, ensuring strict security compliance. Leveraged Cadence tools (Xcelium, waveform debuggers, schematic tracers) for bug identification and debugging. Implemented the integration of Cadence AI's tools, resulting in a 40% reduction in average debugging time and increasing overall team productivity across support operations. Coordinated with RTL and firmware teams (BootROM) to resolve design issues and verify smooth boot flow. Led testbench development and integration of an open-source security IP into an internal security IP, ensuring seamless incorporation into the broader SoC.

Designed and implemented a low-latency FPGA-based Bluetooth-MDB bridge for retrofitting legacy vending machines, replacing ARM-based SoC with Xilinx Artix-7 FPGA for real-time protocol translation. Developed a Verilog-based MDB (Multi-Drop Bus) parser to decode 9-bit UART frames from RJ45 at 9600 baud, streaming commands to a soft-core RISC-V processor. Implemented Bluetooth Low Energy (BLE) packet processing in hardware, handling CRC checks and data unpacking for incoming smartphone app commands (UART-over-BLE). Synchronized asynchronous MDB and BLE streams with dual-clock FIFOs, ensuring reliable data transfer. Reduced LUT usage 40% by switching BLE command buffers from BRAM to distributed RAM. Achieved 2 µs latency for MDB-to-BLE translation by offloading protocol parsing to dedicated FSM modules. Created Python testbenches to generate randomized traffic, validated with Vivado’s integrated logic analyzer. Debugged timing violations via static timing analysis, achieving 125 MHz clock frequency on Artix-7. Integrated with ESP32-based BLE module for RF handling, managing FPGA-module communication via SPI. Reduced vending transaction latency by 70% compared to prior microcontroller-based systems.

Analysed and implemented Communications protocols such as as- TCP/IP,UART , USART, USB Protocol, I2C, CAN, SPI, USB. Analyzed,tested and debugged PCBAs using JTAG. Implemented and studied Wireless Communications protocols such as - Bluetooth, BLE, ZigBEE,2G (GSM),3G & 4G, LTE Cat 0, 1, & 3, 5G, RFID, ANT & ANT+. Studied and implemented Source code control tools such as - GIT. Envisioned and Designed a custom heating system for vending machines that could be controlled remotely via MQTT. This one of a kind system boosted sales of vending machines by 20 %. Assisted maintenance team to accelerate time to repair malfunctions across 200 vending machines. Presented quick ideation to Prototyping skills for rapid learning and product development. Familiarity with various linux based Operating Systems.

Coursework:- Computing Systems Architecture, Real-Time Embedded Systems, Advanced Hardware Design, Hardware Security.