Kenichi Abe

Kenichi Abe

Principal Engineer @ Samsung Electronics

About

I have R&D experience in CMOS Image Sensor (CIS) including medium and long term research topics, and diverse work experience in 2D and 3D NAND flash memory design including physical verification, PDK drafting and improvement, TCAD, row drivers and column sense amplifier circuit design. Especially for NAND flash memory, I’ve been involved in all aspects of the project from the start to the transfer to mass production, including concept design, detailed design, verification, chip evaluation, and defect analysis at the start of mass production.

Country

Japan

City

Tokyo

Industry

Semiconductors

Skill

SPICE (ソフトウェア), pixel, Semiconductors, Research and Development (R&D), Image Sensors, NAND Flash, Nanotechnology, Integrated Circuit Design, TCAD, Failure Analysis, Semiconductor Device, LSI

Experience

Samsung Electronics

Principal Engineer

Samsung Electronics

LinkedIn
2026-3 - Present · 7 mos

日本 神奈川県 横浜

Samsung Electronics

Staff Engineer

Samsung Electronics

LinkedIn
2024-7 - 2026-3 · 1 yr 9 mos

日本 神奈川県 横浜

Engaged in work related to R&D of devices and processes for image sensors.

Huawei Technologies Japan K.K.

Senior Image Sensor Engineer

Huawei Technologies Japan K.K.

2018-11 - 2024-6 · 5 yrs 8 mos

Tokyo, Japan

Medium- to long-term R&D work focusing on CMOS image sensors

Toshiba Memory Corporation

Specialist in non-volatile memory design

Toshiba Memory Corporation

2017-4 - 2018-10 · 1 yr 7 mos

Yokohama, Kanagawa, Japan

I was in charge of the following works for the initial study of next-generation 3D NAND flash memory. 1. TEG design for cell evaluation and process examination 2. Circuit design for cell array drive system 3. Drafting of specifications for the main operation modes such as read, program, and erase of the product, and discussions with related departments

Toshiba Corporation

Non-volatile memory designer

Toshiba Corporation

LinkedIn
2011-4 - 2017-3 · 6 yrs

Yokohama, Kanagawa, Japan

Mother product design and mass production launch support for the last generation of planar NAND flash memory. Formulation of development policy and prototype design for 3D NAND flash memory.

Education

Tohoku University

Tohoku University

LinkedIn

Electrical and Electronics Engineering

2008-4 - 2011-3 · 3 yrs

Studied on statistical analysis for random telegraph noise and its reduction method

Tohoku University

Tohoku University

LinkedIn

Electrical and Electronics Engineering

2006-4 - 2008-3 · 2 yrs

Studied on statistical evaluation for characteristic variations such as threshold voltage and S-factor in scaled MOSFETs

Tohoku University

Tohoku University

LinkedIn

Electrical and Electronics Engineering

2002-4 - 2006-3 · 4 yrs

Kenichi Abe's Contact Information

Email

******@***.com

Phone

(**) *** ****

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