Rohini katthula

Rohini katthula

Embedded Engineer @ Google

About

Experienced Embedded Firmware Engineer with over 5 years of expertise in designing and developing real-time embedded systems. Skilled in Embedded C/C++, RTOS environments (FreeRTOS, VxWorks), and ARM Cortex-M microcontrollers. Proficient in low-level driver development (CAN, SPI, I2C, UART), hardware bring-up, and system debugging using industry-standard tools such as Trace32, WinIDEA, and CANoe. Strong background in automotive firmware, communication protocols, and integration of cybersecurity features. Currently pursuing a Master’s in Computer Engineering and actively seeking full-time opportunities in embedded software and firmware development.

Country

United States

City

San Jose

Industry

Education Management

Skill

TPU, Go (Programming Language), Linux Tools, USB 2.0 / USB Stack (ACM, NCN Classes), Functional Test Design, USB Device Debugging, OSE SDK, Serial Communication (I2C, SPI, UART), Protocol Debugging, ARM Cortex-M3, Free RTOS, CAN Protocol, ARM Cortex-M4, ClearQuest, CPU Profiling & Optimization, Automotive Firmware, Embedded C, python, MIPS Assembly, Machine Learning

Experience

Google

Embedded Engineer

Google

LinkedIn
2026-1 - Present · 8 mos

San Jose, CA

ZF Group

Embedded Software Engineer

ZF Group

LinkedIn
2024-8 - Present · 2 yrs 1 mo

Winona, Minnesota, United States

Project: Steering Column Control Module (SCCM) for automotive systems using ARM Cortex-M4 MCUs. Key Achievements & Skills: As an Embedded Software Engineer at ZF TRW Automotive, I contributed to the development of the Steering Column Control Module (SCCM) for automotive systems using ARM Cortex-M4 microcontrollers. I developed over 10 embedded firmware modules in Embedded C, achieving sub-2ms task switching latency with FreeRTOS. I integrated the CAN communication stack using Vector GENy, reducing response time by 25%, and optimized real-time performance through CPU profiling and trace analysis using WinIDEA and iSystem IC5000. I also implemented cybersecurity features using CycurLIB on S32K MCUs to ensure compliance with ISO 21434 standards. In collaboration with hardware and test teams, I led system validation using CANoe and VT System across more than 30 test cases, boosting test coverage to 95%. I managed requirements using IBM DOORS and maintained 100% traceability of issues using MKS Integrity and ClearQuest.

Sasken Technologies Limited

Firmware Engineer

Sasken Technologies Limited

LinkedIn
2021-11 - 2023-8 · 1 yr 10 mos

India

Project: SoC validation using PSoC5 microcontrollers for analog/digital signal processing. Key Achievements & Skills: As a Firmware Engineer at Sasken Technologies, I worked on embedded firmware development and validation for high-precision automation systems based on PSoC5 microcontrollers. I developed firmware for USB, I2C, and SPI communication protocols, achieving 99.8% data integrity in validation testing. I automated more than 40 test scripts in C/C++ for protocol-level testing, which reduced manual effort by 60%. I led USB compliance and interoperability testing using USB CV and HSETT tools, ensuring full certification readiness. I also integrated BLE and Wi-Fi modules on ARM Cortex-M3 platforms, improving wireless performance by 30%. Additionally, I utilized Keil µVision IDE to configure DMA channels and optimize peripheral access latency by 12%.

Sasken Technologies Limited

Embedded Engineer

Sasken Technologies Limited

LinkedIn
2020-3 - 2021-10 · 1 yr 8 mos

India

Project: USB 2.0 Subsystem validation using Synopsys DWC_OTG controller with M7450 modem. Key Achievements & Skills: As an Embedded Engineer at Sasken Technologies, I was responsible for validating the USB 2.0 subsystem using the Synopsys DWC_OTG controller on the M7450 modem platform. I diagnosed and resolved over 50 complex defects in the USB device stack and ACM/NCM class drivers, significantly improving subsystem stability. I performed crash dump and trace log analysis using Lauterbach Trace32, which reduced debugging time by 40%. I also developed functional test plans for ULPI and HSIC interfaces, achieving 100% test execution across multiple system variants. By working closely with the chip integration team, I helped reduce regression failures by 25% and ensured consistent USB functionality across various configurations.

Education

Illinois Institute of Technology

Illinois Institute of Technology

LinkedIn

Computer Engineering

2023-8 - 2025-5 · 1 yr 10 mos
Sri Venkateswara College of Engineering, Tirupati

Sri Venkateswara College of Engineering, Tirupati

LinkedIn

Electronics and Communications Engineering

2017 - 2021 · 4 yrs

Rohini katthula's Contact Information

Email

******@***.com

Phone

(**) *** ****

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